[AnikethCheluva]

Stack context

Second change above #263, on top of #267 (arc-first-delay/non-e1). Implements the requested Cartesian ARC API consolidation while preserving the local first-delay codec semantics.

Supported contract

Setting	Choices
clock_mode	velocity, duration
streams	full_separation → M×20; translation_rotation → M×18

The first 14 columns are left/right XYZ, YPR, and gripper. Timing columns are T-left, T-right, R-left, R-right, followed by G-left/G-right only for full separation.

• Velocity row zero is start-delay seconds; subsequent rows use emitted waypoint distance divided by source interval seconds.
• Duration stores log(seconds + 0.001) in every timing row, including start delay, and is unlogged once.
• Translation_rotation grippers use their arm's translation supports and clock.
• Full-window holds remain constant; velocity is zero and duration spans the configured hold window.
• Execution retains a waypoint prefix and ends when its first moving stream finishes. No decoder speed floor or E1 fixed-tick path.

Removal and integration

Remove Cartesian mean/wide/log_clock/legacy layout selection, chord/path selection, the E1 tokenizer and dependent projection codec, their ARC recipes, and their codec-specific diagnostics. Keep baseline graphs/data, source-window geometry utilities, planar ARC, and Libero separate.

Add four explicit cotraining recipes; migrate training transforms, normalization provenance, evaluation, visualizations, and HPT rollout declarations. Old keywords fail rather than reinterpret serialized checkpoints.

Historical checkpoints must retain their pinned source. This is a fresh-statistics/fresh-run representation, not a resume migration.

Validation

• 32 numerical comparisons against the preceding local six-stream implementation at f364923a3e675106882823da17f840a9505ab972: token, detokenization, and termination parity.
• 376 CPU codec/data/evaluation/rollout/normalization regression tests passed.
• 18 visual-recipe configuration/export tests passed.
• 142 additional human/YAM, retained baseline graph forward/backward, planar ARC, and pipeline tests passed (536 CPU tests total).
• 379/379 shipped Hydra YAML configurations composed.
• Ruff and whitespace checks pass.

No training launches, remote checkout deployment, or robot commands. GPU throughput, full pretrained-model reloads, and hardware behavior were not tested.

[AnikethCheluva]

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• arc: one clock per arm, absolute-duration clocks with speed-bounded isotonic decode #272 : 2 dependent PRs (#273 , #274 )
• Organize real and sim experiments and remove retired E1 surfaces #270
• configs: organize Cartesian experiments by task #269
• arc: consolidate velocity/duration clocks and M×18/M×20 streams #268 👈 (View in Graphite)
• arc: encode first-row start delays in non-E1 clocks #267
• Bring Aniketh's ARC work onto main with the YAM task recipes and the station rollout runtime #263 : 1 other dependent PR (#266 )
• main

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