[AnikethCheluva]

Stack context

First change above #263. The next PR, #268, narrows Cartesian ARC to velocity/duration clocks and four/six independent streams.

What and why

Encode the initial stationary delay in timing row zero of the non-E1 Cartesian codec. Subsequent rows describe incoming waypoint intervals, rather than repeating a final timing row.

This avoids drifting toward the first moving waypoint during the initial wait. Translation, SO(3) rotation, and grippers retain independent clocks and first-moving-stream termination. It does not add a physical speed floor, smoothing, or fixed-tick execution.

Existing checkpoints require their original source and normalization; the changed layout is not a compatible resume.

Validation

The final stack includes numerical start-delay, hold, tokenizer/detokenizer, first-stream execution, and evaluator/rollout parity tests. No cluster jobs or hardware were started.

[AnikethCheluva]

Warning

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Learn more

• arc: one clock per arm, absolute-duration clocks with speed-bounded isotonic decode #272 : 2 dependent PRs (#273 , #274 )
• Organize real and sim experiments and remove retired E1 surfaces #270
• configs: organize Cartesian experiments by task #269
• arc: consolidate velocity/duration clocks and M×18/M×20 streams #268
• arc: encode first-row start delays in non-E1 clocks #267 👈 (View in Graphite)
• Bring Aniketh's ARC work onto main with the YAM task recipes and the station rollout runtime #263 : 1 other dependent PR (#266 )
• main

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