Style follow-up: localparams, named constants, dead code, typo renames, consistent nesting

[davidharrishmc]

Builds on #1955 (which builds on #1952); merge those first so this PR shows only its own changes.

• `define → localparam for local widths (FCTRLW, CTRLW, BMUCTRLW, plic C). Decode-table literals now carry explicit widths (14'b/24'b/21'b) since a parameter cannot size a literal. INSTR_CLASS_PRED stays a `define in bpred.sv; Use P.INSTR_CLASS_PRED in bpred #1967 replaces it with P.INSTR_CLASS_PRED. Shared config macros (`BP_*) stay.
• Named constants instead of magic numbers, all value-identical: FP format codes use P.*_FMT; new package constants for page types, CMO bits, instruction classes, PMA regions, postprocessor selects, and rounding modes; existing UART_*/CLINT_* register names; RESULTSRC_*.
• Remove dead logic: unused signals and declarations (branch predictors, FPU divider/postprocessor, uncore SDC leftovers, etc.), the unused zknde32 round port, the unreferenced mux6/mux7 modules, and the dead ZeM bits of the FPU's EMFpReg4 pipeline register (now P.NF+1 bits wide).
• Fix typos in names (WordAdrrMux, SelecteDirty, HPTWAccesFaultReg, ADDR_WDITH, CacheBusHPWTStall, ziccslm_align, Div0eMReg, RestorMux, presresultmux, LeftShiftQm→RightShiftQm), updating the coverage-exclusion tag, and the placeholder macro name in rom1p1r_128x32 (generic64x128ROM → generic128x32ROM, matching the file).
• Generate-block else branches that reused the if branch's label get their own (flushlogic→noflushlogic, bpred→nobpred, decomp→nodecomp, cboz→nocboz, tlb→notlb). These hierarchical paths change; nothing in the repo refers to them, but external wave or ILA scripts would need updating.
• csrindextoaddr looks addresses up in a table instead of a one-hot case, and stops elaboration if TOTAL_CSRS exceeds the table.
• Deduplicate where it is not intrusive: unpackinput's per-format exponent re-bias, flags' ShiftGtIntSz, fhazard's forwarding blocks, aes64ks1i, and rev8 via byteop.
• Consistent 2-space nesting (FPU postprocessor, fcvt, fmaalign, AES S-boxes) and whitespace (import cvw::*; #(, port alignment).

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[davidharrishmc]

Review notes: every logic-text change is value-identical or removes dead logic, and today's main merge kept main's new code. The body needs a few corrections:

• It says INSTR_CLASS_PRED became a localparam, but c38e316 put it back: `define INSTR_CLASS_PRED 1 is still at src/ifu/bpred/bpred.sv:30.
• It says pipeline register widths are unchanged, but fpu.sv:358 narrows EMFpReg4 from P.FLEN to P.NF+1 (dropping the dead ZeM bits).
• Not mentioned: deleting mux6/mux7 from src/generic/mux.sv; the rom1p1r_128x32.sv:36 macro name change from generic64x128ROM to generic128x32ROM (a correct placeholder fix); the generate-block renames that change hierarchy paths (noflushlogic, nobpred, nodecomp, nocboz, notlb, zicclsm_align), which nothing in the repo references but external wave/ILA scripts might; and the csrindextoaddr rewrite.
• Nits: csrindextoaddr.sv sizes CSR_ADDR [36] while TOTAL_CSRS is a parameter, so a larger TOTAL_CSRS would index out of bounds (every instantiation uses 36). tlb.sv:116 still compares HitPageType == 3'b000 instead of KILOPAGE.
• Merge strictly Clean up comments and whitespace in src/; delete unused modules #1952 → Comment every module port consistently #1955 → Style follow-up: localparams, named constants, dead code, typo renames, consistent nesting #1959 so each delta shows on its own (227 files cumulatively).

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[davidharrishmc]

Merge order: this is part of the cosmetic stack, merged strictly #1952 → #1955 → #1959 so each delta shows on its own. Merge the open bug-fix PRs first: #1949, #1958, #1967, #1969, #1972, #1982, #1986 and #1987. The stack conflicts textually with them, and re-applying formatting is easier than re-applying fixes.

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[davidharrishmc]

Updated per review:

• tlb.sv NAPOT4 compares HitPageType with KILOPAGE instead of 3'b000 (the tlbcamline Overlap constants were already fixed in 78220e1).
• csrindextoaddr stops elaboration with an error if TOTAL_CSRS exceeds its 36-entry address table (checked on Verilator, Questa and VCS).
• The LSUHREADY port comment in lsu.sv/ebu.sv now says it is gated while the IFU owns the bus (fixed on Comment every module port consistently #1955 and merged up).
• Main (including Wait for wfi in one place; record traps only when taken #1941) merged through the stack Clean up comments and whitespace in src/; delete unused modules #1952 → Comment every module port consistently #1955 → Style follow-up: localparams, named constants, dead code, typo renames, consistent nesting #1959. Clean up comments and whitespace in src/; delete unused modules #1952 is still token-identical to main apart from the four deleted modules, and Comment every module port consistently #1955 differs from Clean up comments and whitespace in src/; delete unused modules #1952 only in comments and the two declaration splits.
• Description corrected: INSTR_CLASS_PRED is still a `define (Use P.INSTR_CLASS_PRED in bpred #1967 replaces it), and it now lists the mux6/mux7 deletion, the ROM macro-name fix, the generate-block label changes, the csrindextoaddr rewrite and the EMFpReg4 narrowing.

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