GPU stack 4/8: apply separable mass matrices as Kronecker products of 1D banded matrices

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Part 4 of 8 of the split of #772 (cuda-aware-mpi-fixes) into stacked PRs. Requires struphy-hub/feectools#104 to be merged into feectools devel-tiny first (PR 1 bumps the submodule).

• feec/kronecker_mass.py: WeightedMassOperator.dot applies the blocks of its matrix that are Kronecker products of 1D banded matrices (constant weights, e.g. on a Cuboid) as three banded passes instead of the 3D stencil product. On the GPU this uses the new kernel kron_band_pass_cuda.cu. STRUPHY_KRONECKER_MASS=0 switches it off.

• The replacement is built on first use and invalidated by assembly, copies and in-place arithmetic. A matrix changed by arithmetic that is not a Kronecker product (e.g. a Schur complement rebuilt every step) is not checked again.

• The boundary and extraction operators around the matrix are skipped when they are identities, instead of being applied as copies.

• The band-pass kernel is launched through feectools' CachedLaunch (feectools#104): the banded passes run with the same buffers in every solver iteration, so the launch preparation is done once per set of buffers.

Tests

Local, macOS without a GPU, in a fresh environment with feectools 1d8d47c and the pinned cunumpy, after merging devel (with #774 and #775). The PR passes test_cuda_parity, test_cuda_emulation, test_kernel_backends, test_sorting, test_accum_matrix_cupy, test_preconditioner_cupy, test_poisson and test_output on its own. The top of the stack also passes the mass-matrix, preconditioner, Derham-GPU, fused-gradient, Kronecker-block, Poisson, shear Alfvén, post-processing, polar fake-CuPy and all pic tests (1477 passed), the examples test for the two profiling cases, the sorting, Poisson and fused-gradient tests under mpirun -n 2, and the device MPI sort on the fake CuPy on 2 and 4 ranks. The Kronecker products match the stencil mass matrices to 5e-16 for M0, M1, M2, M3, Mv, M1n and M2n on a Cuboid, periodic and Dirichlet, on 1 and 2 ranks.
Not tested on a GPU here. The CUDA kernels and the device paths need a run on the cluster.

Stack (merge in order)

0. Device ghost-exchange plans, fused block exchanges, single-reduction PCG (CUDA-aware MPI) feectools#104 (feectools, into devel-tiny)

#	PR	base
1	#782 update feectools (device ghost exchange, single-reduction PCG); pcg_sr solver option	devel
2	#783 host/device conversions in post-processing; math.sqrt in Species	#782
3	#784 CUDA mass-matrix assembly kernel kernel_3d_mat	#783
4	#785 apply separable mass matrices as Kronecker products of 1D banded matrices (this PR)	#784
5	#786 Poisson/diffusion solve with fewer passes over the vectors	#785
6	#787 marker rows prepared inside the push kernels	#786
7	#788 chunked marker loading, row-based weight update, leaner MPI sorting; static field in PushVxB	#787
8	#789 profiling cases Poisson cube and Vlasov slab (CPU node vs GPU, GPU scaling)	#788

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