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feat(hevc): full Vulkan compute pipeline (stages 1-5) on AMD BC-250 - #61
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simpmix merged 7 commits intoOct 15, 2026
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…C-250 - Implements hevc_motion_estimation.comp operating natively on 8x8 CUs - Adds gpu_compute_dispatch_hevc_me() with general compute queue family - Integrates candidate motion vector injection in hevc_enc_template.c - Provides runtime opt-in via BC250_HEVC_GPU_ME=1 flag with full CPU fallback
…patch_hevc_pipeline
- Adds hevc_transform.comp (DST-VII 4x4, DCT-II 4x4/8x8) - Adds hevc_quant.comp (ITU-T LevelScale, deadzone, CBF signaling) - Adds hevc_pred.comp (8-tap fractional luma/chroma motion compensation) - Adds hevc_reconstruct_sao.comp (reconstruction and SAO in VRAM) - Integrates gpu_compute_dispatch_hevc_pipeline() using async compute queue family 1 - Adds docs/hevc_gpu_pipeline.md documenting flags and benchmarks
…ller detection - Adds obs and obs-studio to is_live_caller() to eliminate exhaustive intra/TU4 CPU trials - Implements GPU-informed Early Skip when Wave64 ME detects static background (zero vector, SAD <= 96) - Limits CPU downhill motion search steps to 2 local polish steps when GPU ME provides vector
…e dispatches - Fixes silent bypass of Stage 1 (ME) and Stage 4 (Recon) caused by unallocated recon_image - Binds input and reference image descriptors for me_desc_set in gpu_compute_dispatch_hevc_pipeline - Adds hevc_counters telemetry reporting exact shader dispatches upon driver destruction
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…es and CodeQL audits Integrate Lucas Melo's 5-stage dedicated Vulkan compute pipeline for HEVC (PRs #60 and #61) alongside Mattia Tadini's (MTSistemi) CodeQL fixes: - Fix recon_image allocation and descriptor binds in gpu_compute_dispatch_hevc_me() - Ensure static background GPU early skip strictly validates cand[best_merge] zero MV - Restrict downhill search pruning to cases where GPU ME actually produced vectors - Add comprehensive unit test test_hevc_gpu_flags_and_fallback in test_hevc_encode.c - Integrate scripts/check-secrets.sh and .github/workflows/secrets.yml credentials scan - Clean up redundant bounds checks in cavlc.c, remove unused declarations in encoder_h265.c/h264_mc.c - Fix variable shadowing in h264dec.c and apply context manager to bc250_lab_parse.py
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Summary
This PR implements the complete Vulkan compute encoding pipeline for ITU-T H.265 / HEVC on the AMD BC-250 (Cyan Skillfish, 40 Compute Units, RDNA 1.5), offloading Motion Estimation, 2D Transforms, Quantization/CBF derivation, and VRAM reconstruction onto the GPU.
Builds on and extends PR #60 (Motion Estimation).
Motivation & Context
In commit 4549e11, GPU compute was previously removed from HEVC because H.264 shaders were incompatible with HEVC CTU geometry and caused fence wait stalls.
PR #60 introduced dedicated 8x8 CU Motion Estimation. This PR completes the pipeline so that transforms, quantization, and reconstructed picture management also execute directly across the APU's 40 Compute Units using an asynchronous compute queue (
queue family 1).Changes
hevc_motion_estimation.comp: 8x8 CU Wave64 diamond search with static block early exit.hevc_transform.comp: Forward 2D separable transforms conforming to ITU-T H.265 §8.6.4 (DST-VII 4x4 for intra luma and DCT-II 4x4/8x8 for inter).hevc_quant.comp: Level scaling using ITU-T Table 8-15, deadzone rounding, CBF generation, and inverse quantization for local reconstruction.hevc_pred.comp: 8-tap fractional luma / 4-tap chroma motion compensation filters (§8.5.3).hevc_reconstruct_sao.comp: In-VRAM pixel reconstruction and SAO band offset filter.gpu_compute.c,gpu_compute.h):gpu_compute_dispatch_hevc_pipeline(): chains ME, Transform, Quantization, and Reconstruction within a single command buffer separated by compute barriers.[bc250-gpu] Using dedicated async compute queue family 1).BC250_HEVC_GPU_PIPELINE=1enables the full compute pipeline.BC250_HEVC_FORCE_CPU=1is specified.Validation & Testing
spirv-val --target-env vulkan1.1(0 warnings, 0 errors).ffmpeg -v error -i stream.hevc -f null -(0 NAL/syntax errors).test_encodepasses all multi-slice and rate-control tests.