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Yosys uhdm2rtlil synthesis - #5

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alainmarcel:yosys-uhdm2rtlil-synthesis
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Yosys uhdm2rtlil synthesis#5
alaindargelas wants to merge 5 commits into
jeras:masterfrom
alainmarcel:yosys-uhdm2rtlil-synthesis

syn/uhdm2rtlil: generalise gate-level co-sim harness across SoCs

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