fix(cml): correct MLCT layout and MatrixReg store addresses

[Gs-ygc]

Summary

• scatter MLCT responses into transposed C MatrixReg banks and byte lanes
• use the physical C MatrixReg row-group stride for MSC/MSCT reads
• add regressions for out-of-order load responses and store addressing

Problem

After the MLCT decode hang was fixed, a 64 x 64 e32 MLCT -> MSC self-check failed at the first element of the ninth 8 x 8 block:

LoadT/Store Bad Test!!
LoadT/Store mismatch: reg=0 idx=512 expect=0 actual=687673456

The load path kept the non-transposed bank mapping, while the store path advanced packed logical addresses (... 7, 8) instead of the physical row-group stride (... 7, 64).

Fix

• preserve transpose and source-ID metadata for out-of-order responses
• scatter each e32 response into the transposed bank, entry, and byte lane
• traverse C MatrixReg addresses with Tensor_MN / Matrix_MN stride
• preserve the existing non-transposed load behavior

Validation

• CMemoryLoaderTransposeSpec and CMemoryLoaderStoreAddressSpec: 3 tests passed
• make comp: passed
• DefaultMatrixConfig: MLC/MLCT x MSC/MSCT all passed self-check
• all four combinations passed with NEMU difftest and GOOD TRAP

Depends on #37.

[Copilot]

Pull request overview

This PR fixes correctness issues in the CMemoryLoader (CML) related to MLCT load layout and MSC/MSCT store MatrixReg addressing, especially under out-of-order load responses and when using physical row-group strides.

Changes:

• Add IsLoadTranspose handling and metadata tracking so out-of-order MLCT responses are scattered into the correct transposed C MatrixReg bank/entry/byte-lane locations.
• Update store-side MatrixReg traversal to use physical row-group stride addressing (rather than packed logical addressing), including transpose-aware iterator progression.
• Add new ChiselTest regressions covering (a) out-of-order transpose-load scattering and (b) store MatrixReg address sequencing.

Reviewed changes

Copilot reviewed 3 out of 3 changed files in this pull request and generated 1 comment.

File	Description
src/main/scala/CMemoryLoader.scala	Implements transpose-aware MLCT load scattering and fixes store MatrixReg address traversal/transpose block handling.
src/test/scala/cute/CMemoryLoaderTransposeSpec.scala	New regression test for out-of-order cacheline responses scattered into transposed C MatrixReg layout.
src/test/scala/cute/CMemoryLoaderStoreAddressSpec.scala	New regression test validating physical row-group stride addressing for store-side MatrixReg reads (transpose and non-transpose).

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[ecall73]

LGTM