fix(cml): transpose MatrixReg blocks for MSCT - #37
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Summary
Problem
MSCT already walks scratchpad addresses in transposed order, but each MatrixReg read response was still interpreted as a row-grouped block. The block-local layout was therefore not transposed: for a 64 x 64 e32 matrix, the value at
[0, 1]was stored at linear index 1 instead of transposed index 64.This makes the isolated MLC + MSCT test fail and causes a later Q8_0 matrix result to diverge from NEMU under difftest.
Fix
Interpret the FIFO response as a
Matrix_MN x Matrix_MNblock ofResultWidthelements. WhenIsStoreTransposeis set, transpose that block before feeding the existing LLC reorder registers.Validation
make compin XSAI:xiangshan.compilepassedxiangshan.test.compilepassedMinimalMatrixConfig/ OpenLLC Apple GSIM with NEMU difftest:Load/StoreT Test passedand GOOD TRAP after the fixM=1024, N=128, K=2048: GOOD TRAP at 2.354 M cycles, 23.308% MFUScope
This PR fixes the MSCT output layout only. The independently observed MLCT forward-progress problem is not changed here.