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feat(sx126x): add external RF-switch GPIO support (tx/rx-enable-gpios) - #1

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feat/sx126x-external-rf-switch-gpio
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feat/sx126x-external-rf-switch-gpio

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What

Adds optional tx-enable-gpios / rx-enable-gpios devicetree properties for the sx126x driver, with wiring in sx126x_board.c and opcode-intercept logic in sx126x_hal.c (sx126x_hal_update_rf_switch()) that drives the switch based on the SPI opcode being sent (TX-class, RX-class, or inactive).

Why

Some SX126x modules (e.g. EBYTE E22-400M30S) drive their RF switch via two dedicated GPIOs (TX-EN, RX-EN) instead of DIO2, so the existing dio2-as-rf-switch mechanism doesn't work for them. Boards without the new DT properties are unaffected: gpio_dt_spec.port is NULL and all switch-control branches are skipped at runtime, so behavior for existing boards is unchanged.

Validation

The EBYTE E22-400M30S (SX1262) module drives its RF switch via two
dedicated GPIOs (TX-EN, RX-EN) rather than DIO2, so the existing
dio2-as-rf-switch mechanism is unusable on boards using this module.

Changes:
- dts/bindings/usp/semtech,sx126x-new-common.yaml: add optional
  tx-enable-gpios and rx-enable-gpios phandle-array properties with
  full description of operating-mode semantics.
- drivers/usp/sx126x/sx126x_hal_context.h: add tx_enable and
  rx_enable gpio_dt_spec fields to sx126x_hal_context_cfg_t (both
  zero-initialised / .port==NULL when absent in DT, so boards without
  the properties compile and behave identically to before).
- drivers/usp/sx126x/sx126x_board.c: configure both pins as
  OUTPUT_INACTIVE at init; wire them into SX126X_CONFIG via the
  existing CONFIGURE_GPIO_IF_IN_DT helper.
- drivers/usp/sx126x/sx126x_hal.c: add sx126x_hal_update_rf_switch()
  that intercepts the first byte of every sx126x_hal_write() command
  buffer and drives the GPIOs before the SPI transaction:
    TX-class (TX-EN=1, RX-EN=0): 0x83 SetTx, 0xD1 SetTxContinuousWave,
                                  0xD2 SetTxInfinitePreamble
    RX-class (TX-EN=0, RX-EN=1): 0x82 SetRx, 0x94 SetRxDutyCycle,
                                  0xC5 SetCad
    Inactive  (TX-EN=0, RX-EN=0): 0x84 SetSleep, 0x80 SetStandby
    All other opcodes leave switch state unchanged.
  Deactivation of the leaving path always precedes activation of the
  entering path to prevent simultaneous PA+LNA enable.

Boards without tx-enable-gpios / rx-enable-gpios in DT are unaffected:
gpio_dt_spec.port is NULL and all branches are skipped at runtime.
Build verified: zephyr.elf + zephyr.uf2 compile clean on Zephyr 4.3 /
RP2350 with FLASH 104760 B / RAM 31564 B (ping_pong sample).
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📥 Commits

Reviewing files that changed from the base of the PR and between bfacd43 and a3a03c5.

📒 Files selected for processing (4)
  • drivers/usp/sx126x/sx126x_board.c
  • drivers/usp/sx126x/sx126x_hal.c
  • drivers/usp/sx126x/sx126x_hal_context.h
  • dts/bindings/usp/semtech,sx126x-new-common.yaml

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@Mikefly123

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Stack position 1/6 (bottom) of stack Lora-net#8: base main. Next: #2.

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