Popular repositories Loading

1. Yield-Aware-CMOS-Inverter-KLayout Yield-Aware-CMOS-Inverter-KLayout Public

   Designed a CMOS inverter layout in KLayout and performed yield-oriented defect analysis, including missing contact, metal open, metal short, spacing violation, and poly gate break defects to study …

2. 6T-SRAM-LTspice 6T-SRAM-LTspice Public

   Design, simulation and verification of a CMOS 6T SRAM cell in LTspice including Hold, Write, Read and Bit-line Capacitance analysis.

   AGS Script

3. Semiconductor-Wafer-Yield-Analysis-using-Python Semiconductor-Wafer-Yield-Analysis-using-Python Public

   Python-based semiconductor wafer yield analysis project featuring synthetic wafer database generation, statistical process control (SPC), defect analysis, root cause identification, and data visual…

   Jupyter Notebook

4. Semiconductor-Statistical-Process-Control-SPC-Analysis.ipynb Semiconductor-Statistical-Process-Control-SPC-Analysis.ipynb Public

   Semiconductor lithography process analysis using Python and SPC, covering control charts, process capability, excursion detection, root-cause analysis, corrective action, and wafer-level yield impr…

   Python