build: restore SM70 (Volta) compilation — 3 csrc fixes (fabric symbols, bf16 helpers, arch-conditional activation kernels) - #435
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On TP > 1 with 2x Tesla V100 32GB (SM70, PCIe, no NVLink), the custom all-reduce path leads to: - piecewise CUDA-graph capture that never converges (>45 min stuck at 0/3 graphs; ~3 min total once the custom all-reduce is disabled) - decode throughput collapse (50.5 -> 0.1 tok/s on a 27B AWQ model) - Xid 62 raised on BOTH GPUs, leaving nvidia-smi and the worker processes in D-state; the host requires a reboot to recover Returning False from use_custom_allreduce() for Volta makes the existing parallel-config fallback (NCCL) kick in automatically, which is stable for hours under the same workload. This mirrors the well-known guidance to pass --disable-custom-all-reduce on V100, but applies it at the platform level so users cannot miss it. Validated on 2x V100-SXM2-32GB, Qwen3.8-27B AWQ, TP2, max-model-len 262144: with the fix the engine starts, captures CUDA graphs in ~3 minutes and sustains 4-way concurrency for the full benchmark plan without any driver events. Signed-off-by: Joker <joker@sabatech.dev>
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Restores the SM70 (Volta) build of main (1.5.0-RC state, fa344ed). Evidence and error details in issue #433.
Changes
csrc/cumem_allocator.cpp — symbol-guard the fabric-handle block with
#ifdef CU_MEM_HANDLE_TYPE_FABRIC(the TU can resolve<cuda.h>to thedistro toolkit copy, which predates fabric handles) and hoist the
fab_flagdeclaration so the error handler compiles either way.CMakeLists.txt — exclude
csrc/quantization/activation_kernels.cuwhen none of the requested CUDA architectures is >= 80: its deep_gemm
fp8 paths instantiate bf16 packed intrinsics that CUDA gates to
__CUDA_ARCH__ >= 800and are runtime-dead on Volta anyway.csrc/libtorch_stable/cuda_vec_utils.cuh — add bit-exact SM70
emulations for the bf16 packed conversions (
vec_bf162_to_float2,vec_float2_to_bf162_rn) and routecast_to_float2/cast_to_packed/packed_multhrough them under__CUDA_ARCH__ < 800. bf16 -> fp32 is anexact mantissa shift; fp32 mul of two bf16 values is exact and the RNE
pack yields the correctly-rounded bf16 product (same results as the
native path). Architectures >= 800 keep the intrinsics untouched.
Tests run
pip install -e . --no-build-isolationon 2x V100 32GB (SM70-only build,CUDA 12.8, torch 2.10.0+cu128, Python 3.12): before = metadata/build
failure at the first nvcc invocation; after = compiles through the full
extension set (validation run in progress on real hardware; will report
back with runtime confirmation on the 1.5.0-RC state).
python -m py_compileon the touched Python-free files is N/A; theCMake change was exercised through a clean reconfigure.
AI assistance disclosure
Prepared with AI coding assistance (OpenCode agent, SabaTech.dev lab). The
submitting human reviewed every changed line and reproduced the SM70 build
failure and the fix on real hardware.