docs(fleet): the adoption round's outcomes, and the via allowlist that blocks it

[zackees]

Merged

zackees/reld #218 (ac71f0b) — worst case 5.92 GiB against a 9.5 GB budget. 7 entries stay undeclared: no via exists for msys2-pkgs, llvm-ld-coff, linkers-Linux or setup-soldr-targetcache-thin-v2.

Open drafts

zackees/bosn#513 — draft because adding a ci.toml surfaces 461 pre-existing findings (LAYOUT-001 ×208, SEC-004 ×148) that were invisible while there was no ci.toml.

The agent also corrected my premise: bosn is not 221 distinct builds. It is 13 live build-cache entries under 4 toolchain digests — setup-soldr#237 deliberately dropped the per-commit SHA so caches survive across commits — plus 196 tiny ci-lint attestation caches. A janitor dry-run plans 9.86 → 2.07 GB.

zackees/mimalloc-pprof#603 — draft because a local gate exists. Declared families fit at 8.02 GiB vs 9.5 GB, but 3.58 GiB (42%) is undeclareable — see below.

FastLED/fbuild#1652 — fits at 9.75 GB against 9.5 GB, 448 MB headroom.

Structural

FastLED/FastLED #4703 applies save: 'false' on PR board jobs so they restore without writing.

It deliberately does not apply cache-mode: 'split' — verified available (it's on fbuild main, and FastLED pins @main, a floating ref) but genuinely broken: the setup step runs before the compile step synthesises platformio.ini, and fbuild install hard-fails on apollo3_red, clone and kitchensink. Shipping it would turn board jobs red. Stops the leak at ~120 GiB; does not reach 10 GiB. It also corrected my brief: 30 boards have surviving entries, not 64 (64 is the workflow count).

A bug in my own #334

shapes made CACHE-004 sum the shape maxima while _lru_evictions still used max × cardinality(per). Where they diverge the janitor is stricter, so it evicted live entries precheck had approved. Found independently by three of the four agents; fixed in #343 — both paths now call family_footprint.

Next blocker, now the top ci.yml item

ALLOWED_VIA_VALUES has no entry for shapes setup-soldr actually emits, so they can never be declared and are reported undeclared forever:

• setup-soldr-targetcache-thin-v2-
• setup-soldr-prepare-* without its v3 segment (needs a legacy_prefixes entry)
• setup-soldr-tarball-*
• setup-soldr-cargo-registry-v2-*
• cook-base-v1-*

That is 42% of mimalloc-pprof's cache, and it blocks reld and fbuild too. The via table cites setup-soldr's own source in docs/ci-toml.md, so these are the same kind of addition.

Refs #153, #334, #343

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