Skip to content
View you-weilu's full-sized avatar

Block or report you-weilu

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Content in all repositories owned by your account will be closed.
Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. xuyizhou8129/axi-dma-engine xuyizhou8129/axi-dma-engine Public

    SystemVerilog 4

  2. dmatapeout dmatapeout Public

    SystemVerilog 2 1

  3. axryap27/agentic-rtl-engine axryap27/agentic-rtl-engine Public

    A LangGraph pipeline that generates verified RTL from natural language via stepwise refinement using agents

    Python 3

  4. matrix-multiplication-accelerator matrix-multiplication-accelerator Public

    FPGA-based INT8 matrix multiplication accelerator on the ALINX AX7103 (Xilinx XC7A100T), featuring a 16×16 systolic array with a PCIe Gen2 x4 host interface via Xilinx XDMA.

    C++

  5. wr-timing-characterization wr-timing-characterization Public

    Three-node White Rabbit synchronization network timing characterization for quantum networking research. Northwestern University Kumar Lab.

    Python

  6. qwn_polarization_compensator qwn_polarization_compensator Public

    Real-time Stokes-parameter computation and QWP/HWP/LCR correction math for QWN polarization compensation on FPGA.

    Verilog