Skip to content
Open
Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
42 commits
Select commit Hold shift + click to select a range
9ec531d
Add specs for is_gpr_type, ty_bits_u16, ext_mode, synthetic_amode_to_…
yuetongz417 Apr 28, 2025
d9f545f
Add specs for is_gpr_type, ty_bits_u16, ext_mode, synthetic_amode_to_…
yuetongz417 Apr 28, 2025
3efb362
Add spec for MovzxRmR and reg_mem_to_gpr_mem (parser error); got solv…
yuetongz417 Apr 30, 2025
3e4d6de
1) load_narrow: fix GprMem to be struct with 2 field (data, isMem); f…
yuetongz417 May 6, 2025
bb8431b
1. load_narrow: still got vacuous model
yuetongz417 May 6, 2025
2a181f6
1. load_narrow: fix vacuous model problem, got a new counterexample (…
yuetongz417 May 7, 2025
da2505a
Verified load_narrow and left_shift_small:
yuetongz417 May 7, 2025
76afd21
Verified store_narrow: added spec for MInst.MovRM
yuetongz417 May 8, 2025
0a16c05
Verified Xor_mem_reg: add specs fors sinkable_load, MInst.AluRM, sink…
yuetongz417 May 8, 2025
6e77436
Create ModellingSystem.md
yuetongz417 May 9, 2025
24b7a07
Rename ModellingSystem.md to CS340Final.md
yuetongz417 May 9, 2025
a33857d
debugged standalone file runner
yuetongz417 Sep 26, 2025
bb45244
Cleanup: remove generated files and add .gitignore
yuetongz417 Sep 26, 2025
f75dd4c
Delete cranelift/isle/veri/veri/out.txt
yuetongz417 Sep 26, 2025
6af138a
clean up redundant spaces/typos
yuetongz417 Sep 26, 2025
dc0173f
fix minor typo
yuetongz417 Sep 26, 2025
3545d74
fix comment redundancy in veri.rs
yuetongz417 Sep 28, 2025
1fbad15
add comment to veri shell script
yuetongz417 Sep 28, 2025
ae2d582
Merge branch 'veriisle' into arrival-runner
avanhatt Oct 2, 2025
a1e82cb
change file format
yuetongz417 Oct 2, 2025
ff6f1a9
Merge branch 'arrival-runner' of https://github.com/Winniezyt/wasmtim…
yuetongz417 Oct 2, 2025
a41f88e
enum_model setup code
yuetongz417 Oct 16, 2025
3624827
add ExtEnum support in types and symbolic/value handling
yuetongz417 Oct 16, 2025
ca7374c
add ExtEnum support accross AST, types, and spec
yuetongz417 Oct 16, 2025
0a6a016
add support for parsing and lowering type-ext-enum models
yuetongz417 Oct 16, 2025
e666aec
add support for parsing and lowering type-ext-enum models
yuetongz417 Oct 16, 2025
54051c3
add support for parsing and lowering type-ext-enum models
yuetongz417 Oct 16, 2025
20dcee4
fix the bug that the verifier cannot find the enum type defined above…
yuetongz417 Oct 16, 2025
cab188e
fix duplicate type model error by bypassing set_model_type if the nam…
yuetongz417 Oct 16, 2025
48d41af
setup code for debugging optional field/enum variant access problem
yuetongz417 Oct 21, 2025
ff6f8ba
fix duplicated spec problem
yuetongz417 Oct 21, 2025
649e3bd
add more annual rules, add ExtEnum case in values_equal @ veri.rs, an…
yuetongz417 Oct 21, 2025
f6de2a5
verifier running without bug, but rule not successfully verified
yuetongz417 Nov 13, 2025
e275317
add new specs
yuetongz417 Nov 21, 2025
5fc6309
add & amend speces
yuetongz417 Nov 21, 2025
079981f
alexa wip
avanhatt Nov 21, 2025
29b4e61
alexa wip
avanhatt Nov 21, 2025
edcd002
remove unncessary specs, add extra constraints on ConsumesFlag relate…
yuetongz417 Dec 8, 2025
2b99abd
remove unnecessary constraints on width & add print statement for ina…
yuetongz417 Dec 8, 2025
a256bf8
added spec to constrain :hi
yuetongz417 Dec 8, 2025
d11ffb7
alexa comments
avanhatt Dec 8, 2025
e2205ef
encounter new problem of verification failure, print out failed asser…
yuetongz417 Feb 23, 2026
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 11 additions & 1 deletion cranelift/codegen/src/inst_specs.isle
Original file line number Diff line number Diff line change
Expand Up @@ -96,6 +96,16 @@
((args (named Type) (bv 64) (bv 64) (bv 64)) (ret (bv 64)))
)

;;;; i128 bit cases ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
(form
bv_binary_8_to_128
((args (named Type) (bv 8) (bv 8)) (ret (bv 8)))
((args (named Type) (bv 16) (bv 16)) (ret (bv 16)))
((args (named Type) (bv 32) (bv 32)) (ret (bv 32)))
((args (named Type) (bv 64) (bv 64)) (ret (bv 64)))
((args (named Type) (bv 128) (bv 128)) (ret (bv 128)))
)

;;;; CLIF Instruction Specifications ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

;; Integer Instructions
Expand Down Expand Up @@ -327,7 +337,7 @@

(spec (rotl ty x y)
(provide (= result (rotl x y))))
(instantiate rotl bv_binary_8_to_64)
(instantiate rotl bv_binary_8_to_128)

(spec (rotr ty x y)
(provide (= result (rotr x y))))
Expand Down
12 changes: 9 additions & 3 deletions cranelift/codegen/src/isa/aarch64/inst.isle
Original file line number Diff line number Diff line change
Expand Up @@ -1256,7 +1256,7 @@
)

;; Registers.
(model Reg (type (bv)))
(model Reg (type (bv 64)))

;; An ALU operation. This can be paired with several instruction formats
;; below (see `Inst`) in any combination.
Expand Down Expand Up @@ -1394,14 +1394,20 @@
))

(type SImm7Scaled (primitive SImm7Scaled))

(model SImm7Scaled (type (bv 1)))
(type BoxCallInfo (primitive BoxCallInfo))
(model BoxCallInfo (type (bv 1)))
(type BoxCallIndInfo (primitive BoxCallIndInfo))
(model BoxCallIndInfo (type (bv 1)))
(type BoxReturnCallInfo (primitive BoxReturnCallInfo))
(model BoxReturnCallInfo (type (bv 1)))
(type BranchTarget (primitive BranchTarget))
(model BranchTarget (type (bv 1)))
(type BoxJTSequenceInfo (primitive BoxJTSequenceInfo))
(type CodeOffset (primitive CodeOffset))
(model CodeOffset (type (bv 1)))
(type VecMachLabel extern (enum))
(model VecMachLabel (type (bv 1)))

(type CondBrKind extern
(enum
Expand Down Expand Up @@ -1441,7 +1447,7 @@
))

(type MemLabel extern (enum))
(model MemLabel (type !))
(model MemLabel (type (bv 1)))
(type SImm9 extern (enum))
(model SImm9 (type (bv 9)))
(type UImm12Scaled extern (enum))
Expand Down
2 changes: 1 addition & 1 deletion cranelift/codegen/src/isa/aarch64/lower.isle
Original file line number Diff line number Diff line change
Expand Up @@ -1688,7 +1688,7 @@
;; General 128-bit case.
;;
;; TODO: much better codegen is possible with a constant amount.
(rule (lower (has_type $I128 (rotl _ x y)))
(rule rotl_i128 (lower (has_type $I128 (rotl _ x y)))
(let ((val ValueRegs x)
(amt Reg (value_regs_get y 0))
(neg_amt Reg (sub $I64 (imm $I64 (ImmExtend.Zero) 128) amt))
Expand Down
68 changes: 56 additions & 12 deletions cranelift/codegen/src/prelude_lower.isle
Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,7 @@
(type VecReg extern (enum))
(type VecWritableReg extern (enum))
(type PReg (primitive PReg))
(model PReg (type (bv 1)))

;; Construct a `ValueRegs` of one register.
(decl value_reg (Reg) ValueRegs)
Expand All @@ -61,6 +62,11 @@

;; Construct a `ValueRegs` of two registers.
(decl value_regs (Reg Reg) ValueRegs)
(spec (value_regs arg1 arg2)
(provide
(= (:lo result) arg1)
(= (:hi result) arg2)))

(extern constructor value_regs value_regs)

;; Construct a `WritableValueRegs` of two registers.
Expand Down Expand Up @@ -235,16 +241,23 @@
;;;; Common Mach Types ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

(type MachLabel (primitive MachLabel))
(model MachLabel (type (bv 1)))
(type ValueLabel (primitive ValueLabel))
(type UnwindInst (primitive UnwindInst))
(model UnwindInst (type (bv 1)))
(type ExternalName (primitive ExternalName))
(model ExternalName (type (bv 1)))
(type BoxExternalName (primitive BoxExternalName))
(model BoxExternalName (type (bv 1)))
(type RelocDistance (primitive RelocDistance))
(type VecArgPair extern (enum))
(model VecArgPair (type (bv 1)))
(type VecRetPair extern (enum))
(model VecRetPair (type (bv 1)))
(type CallArgList extern (enum))
(type MachLabelSlice extern (enum))
(type BoxVecMachLabel extern (enum))
(model BoxVecMachLabel (type (bv 1)))

;; Extract a the target from a MachLabelSlice with exactly one target.
(decl single_target (MachLabel) MachLabelSlice)
Expand Down Expand Up @@ -425,7 +438,7 @@
;; Constant pool emission.

(type VCodeConstant (primitive VCodeConstant))
(model VCodeConstant (type !))
(model VCodeConstant (type (bv 1)))

;; Add a u64 little-endian constant to the in-memory constant pool and
;; return a VCodeConstant index that refers to it. This is
Expand Down Expand Up @@ -502,7 +515,7 @@
(ProducesFlagsReturnsResultWithConsumer (inst MInst) (result Reg))))

(model ProducesFlags
(type
(type-ext-enum
(struct
(flags (named NZCV))
(result (named Reg))
Expand All @@ -515,6 +528,7 @@
(provide
(= (:flags result) (:flags_out inst))
(= (:result result) reg)
(= (widthof (:result result)) 64)
(:has_result result)
)
)
Expand Down Expand Up @@ -570,7 +584,7 @@
(result ValueRegs))))

(model ConsumesFlags
(type
(type-ext-enum
(struct
(flags (named NZCV))
(result (named Reg))
Expand All @@ -583,23 +597,52 @@
(provide
(= (:flags result) (:flags_in inst))
(= (:result result) reg)
(= (widthof reg) 64)
(:has_result result)
)
)

(spec (ConsumesFlags.ConsumesFlagsSideEffect2 inst1 inst2)
(provide
(= (:flags result) (:flags_in inst1))
(= (:result result) zero_reg)
(= (widthof zero_reg) 64)
(= (:has_result result) false)))

(spec (ConsumesFlags.ConsumesFlagsReturnsReg inst reg)
(provide
(= (:flags result) (:flags_in inst))
(= (:result result) reg)
(:has_result result)
)
(provide
(= (:flags result) (:flags_in inst))
(= (:result result) reg)
(= (widthof reg) 64)
(:has_result result)
)
)

(spec (ConsumesFlags.ConsumesFlagsSideEffect inst)
(provide
(= (:flags result) (:flags_in inst))
(not (:has_result result))
)
(provide
(= (:flags result) (:flags_in inst))
(= (:result result) zero_reg)
(= (widthof zero_reg) 64)
(= (:has_result result) false)
)
)

(spec (ConsumesFlags.ConsumesFlagsTwiceReturnsValueRegs inst1 inst2 regs)
(provide
(= (:flags result) (:flags_in inst1))
(= (:result result) (:lo regs))
(= (widthof (:lo regs)) 64)
(= (widthof (:hi regs)) 64)
(= (:has_result result) true)
)
)

(spec (ConsumesFlags.ConsumesFlagsFourTimesReturnsValueRegs inst1 inst2 inst3 inst4 regs)
(provide
(= (:flags result) (:flags_in inst1))
(= (:result result) (:lo regs))
(= (:has_result result) true)
)
)

;; Get the produced register out of a ProducesFlags.
Expand All @@ -618,6 +661,7 @@
;; Helper for combining two flags-consumer instructions that return a
;; single Reg, giving a ConsumesFlags that returns both values in a
;; ValueRegs.
(attr consumes_flags_concat (veri chain))
(decl consumes_flags_concat (ConsumesFlags ConsumesFlags) ConsumesFlags)
(rule (consumes_flags_concat (ConsumesFlags.ConsumesFlagsReturnsReg inst1 reg1)
(ConsumesFlags.ConsumesFlagsReturnsReg inst2 reg2))
Expand Down
9 changes: 9 additions & 0 deletions cranelift/isle/isle/src/ast.rs
Original file line number Diff line number Diff line change
Expand Up @@ -454,6 +454,13 @@ pub enum ModelType {
Struct(Vec<ModelField>),
/// Same model as the named type.
Named(Ident),
ExtEnum(Vec<ModelVariant>),
}

#[derive(Clone, PartialEq, Eq, Debug)]
pub struct ModelVariant {
pub name: Ident,
pub fields: Vec<ModelField>,
}

#[derive(Clone, PartialEq, Eq, Debug)]
Expand All @@ -469,6 +476,8 @@ pub enum ModelValue {
TypeValue(ModelType),
/// Corresponds to ISLE external constants.
ConstValue(SpecExpr),
// New ExtEnum model value
ExtEnumValue(Vec<ModelField>),
}

/// A model of a construct into SMT-LIB (currently, types or enums)
Expand Down
20 changes: 19 additions & 1 deletion cranelift/isle/isle/src/parser.rs
Original file line number Diff line number Diff line change
Expand Up @@ -802,8 +802,26 @@ impl<'a> Parser<'a> {
} else if self.eat_sym_str("const")? {
let val = self.parse_spec_expr()?;
ModelValue::ConstValue(val)
} else if self.eat_sym_str("type-ext-enum")? {
// Now we should be sitting right before (struct …)
self.expect_lparen()?;
if !self.eat_sym_str("struct")? {
return Err(self.error(pos, "expected (struct ...) inside type-ext-enum".to_string()));
}

let mut fields = Vec::new();
while !self.is_rparen() {
self.expect_lparen()?;
let fname = self.parse_ident()?;
let fty = self.parse_model_type()?;
self.expect_rparen()?;
fields.push(ModelField { name: fname, ty: fty });
}
self.expect_rparen()?;

ModelValue::ExtEnumValue(fields)
} else {
return Err(self.error(pos, "Model must be a type, enum or const".to_string()));
return Err(self.error(pos, "Model must be a type, enum, type-ext-enum, or const".to_string()));
};

self.expect_rparen()?; // end body
Expand Down
26 changes: 18 additions & 8 deletions cranelift/isle/veri/veri/script/veri.sh
Original file line number Diff line number Diff line change
Expand Up @@ -37,11 +37,21 @@ if [[ ! -d "${tmp_dir}" ]]; then
exit 1
fi

# Run.
cargo run --bin veri --profile "${profile}" -- \
--codegen-crate-dir ../../../codegen/ \
--work-dir "${tmp_dir}" \
--name "${arch}" \
--log-dir "${output_dir}/log" \
"$@" \
| tee "${output_dir}/${arch}.veri"
# Standalone file mode
# Detect --file in arguments and forward directly to cargo run
if echo "$@" | grep -q -- "--file"; then
echo "[veri.sh] Running in file mode with args: $@"
# Write results to output/filemode.veri instead of arch-specific logs
cargo run --bin veri --profile "${profile}" -- "$@" \
| tee "${output_dir}/filemode.veri"
else
# Normal arch-based single-rule mode
echo "[veri.sh] Running in normal mode with arch=${arch}"
cargo run --bin veri --profile "${profile}" -- \
--codegen-crate-dir ../../../codegen/ \
--work-dir "${tmp_dir}" \
--name "${arch}" \
--log-dir "${output_dir}/log" \
"$@" \
| tee "${output_dir}/${arch}.veri"
fi
Loading
Loading