walk-free: C3/ESP32 Class-A sweep — 21 verified-inert models unpinned#517
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ESP32-C3/ESP32 analogue of STM32 batch B0 (docs/walk_free_plan.md): assert
needs_legacy_walk()==false on the 21 model types whose tick() is a structural
no-op in every state (pure register banks / read-forced status stubs / models
whose work runs atomically at the MMIO access), so they stop pinning the
per-cycle legacy walk on the C3 OLED rom-boot bus and the classic-ESP32 buses
sharing these models.
Each override verified against the model's tick path: these types either
define no tick()/tick_elapsed()/on_event()/sync_to()/uses_scheduler() at all
(trait defaults) or carry an explicitly-documented no-op tick(), and none can
emit an IRQ, DMA request, mmio-write, or fired event from the walk in any
reachable state.
Marked (esp32c3): Esp32c3AnaI2c, Esp32c3Cache, Esp32c3ForcedStatus,
Esp32c3RegBlock, Esp32c3Rng, Esp32c3SarAdc (rom-boot cal window), Esp32c3Sha.
Marked (esp32s3 models shared onto the C3 rom-boot bus): SpiMemFlash,
FlashXipPeripheral, Esp32s3MmuTable, UsbSerialJtag.
Marked (esp32 classic): Dport, Esp32Twai, Efuse, Ledc, Mcpwm, Esp32SarAdc,
HostSlc, Sha, Esp32Spi, Syscon.
NOT marked — verified REAL walk workers, deliberately left pinning:
- esp32c3 i2c0: the bit-level wire engine advances mid-transfer in
tick_elapsed (num/den module-clock fraction) + level IRQ re-assert.
- esp32c3 ledc: the four low-speed timers run as live up-counters clocked by
elapsed cycles, latching LSTIMERx_OVF.
- esp32c3 spi2 / apb_saradc (esp32c3_apb_saradc): tick() re-asserts the level
interrupt source while int_raw & int_ena != 0 — reachable whenever firmware
enables the ints, so deleting the walk would starve the IRQ.
- esp32c3 wifi_mac: tick_with_bus pumps the TX/RX descriptor rings + tick()
re-asserts the level MAC interrupt while events are pending.
- systimer (S3 model in legacy-tick mode on C3): real counter/alarm work.
- esp32 classic i2c (level IRQ from tick) and uart (FIFO drain pacing + level
IRQ): real walk work, unchanged.
The endgame ledger (esp32c3_walk_differential::
oled_lab_walk_pinners_after_rtc_migration) now asserts the EXACT pinned set
on the real OLED rom-boot bus — {apb_saradc, i2c0, ledc, spi2, systimer,
wifi_mac} — and that the bus still does not derive walk-deletion
(max_safe_tick_interval stays 1). Zero behavior change: the release-mode
walk-on-vs-scheduler and interval-1-vs-64 OLED differentials stay
byte-identical.
Validation: dated drift comments + drift_ack (esp32c3, esp32s3 entries) per
the manifest convention; VALIDATION_STATUS.md regenerated; both generator
checks pass.
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ESP32-C3/classic analogue of B0 (#515). Verify-then-override
needs_legacy_walk() = falseon 21 model types whose tick is structurally inert in all states (work happens at MMIO access): C3 ana_i2c/cache/forced_status/reg_block/rng/sar_adc/sha, shared spi_mem_flash/flash_xip×2/usb_serial_jtag, classic dport/twai/efuse/ledc/mcpwm/sar_adc/sdio_stub/sha/spi/syscon.Conservative discipline caught four candidates the #516 summary list had wrong — all left pinned with evidence:
i2c0(bit-level wire engine advances in tick_elapsed), C3ledc(live up-counters latching LSTIMERx_OVF), and two new rejections:spi2andapb_saradcre-assert their level interrupt source from tick() while int_raw & int_ena != 0 — flipping them would starve the IRQ once a bus derives walk-deletion.Endgame ledger updated: the C3 OLED rom-boot pinned set is now exactly {apb_saradc, i2c0, ledc, spi2, systimer, wifi_mac}, asserted with ids; walk-deletion still not derived, max_safe_tick_interval == 1 — zero behavior change by construction.
All lanes green (workspace lib, jit+event-scheduler 1845/1845, clippy -D warnings both, fmt, wasm32, C3 differentials + release-mode OLED boot suite, leo readback); drift gate green (dated acks, single trailing key); known machine-local intmatrix_alarm verified identical on unmodified main via stash A/B.