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CPU Emulator

(Docs under construcion)


Overview

This project implements computer architecture concepts to simulate low-level CPU behavior by decoding machine code instructions into Assembly.

It was built as part of admission process of my university's Hardware and Robotics Academic League.

I'm grateful to the colleagues who worked on it with me; Francisco Passos (@FrankSteps), Gabriel Santos (@gbr-ufs) and Guilherme Ferreira (@GuilhermeAmancio).


Architecture

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Execution Flow

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Usage

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Build

make

About

A little-endian RISC architecture emulator that simulates CPU behavior by implementing memory, registers and the fetch-decode-execute cycle.

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