Add loongarch 256-bit LASX SIMD optimization#1458
Conversation
|
|
||
| #ifdef __loongarch_asx | ||
| { | ||
| asm volatile |
There was a problem hiding this comment.
Using "volatile" is generally a bad idea (unless there is a side-effect not explainable by the input/output/clobber). If it does not work w/o "volatile", you've likely missed some register input/output/clobber.
There was a problem hiding this comment.
affect performance or something else ?
There was a problem hiding this comment.
Because "if it's a chicken, don't model it as a duck".
There was a problem hiding this comment.
Please , provide helpful suggestions.
There was a problem hiding this comment.
Is it broken after if we remove volatile? If it's not broken, just remove volatile. Otherwise try to figure out why the compiler breaks it and fix the input/output/clobber list.
volatile means there is some unexplainable side effect, for example writing/reading some CSRs, invoking hardware memory barriers, etc. These just do not apply for a SIMD optimization.
There was a problem hiding this comment.
just want to tell compiler not to optimize or modify the asm block.
There was a problem hiding this comment.
just want to tell compiler not to optimize or modify the asm block.
It won't modify the asm block because the compiler does not parse asm at all.
The only possible optimizations are:
- Reorder the asm block (as a whole block: the compiler cannot insert something in the middle of the asm block because it does not know how to parse asm) with the instructions generated by the compiler itself.
- Remove the asm block completely (not "removing a part of the asm", again because the compiler does not know how to parse asm).
If the input/output/clobber lists are correct, 2 should be disabled, and 1 should be performed in a constrained way not to break the code.
Again volatile means "there is unexplainable side effect", not "don't modify the asm block".
There was a problem hiding this comment.
Well, and maybe
- Duplicating the asm block due to a loop unrolling etc. Again if the input/output/clobber lists are correct this should happen in a safe way.
| asm volatile | ||
| ( | ||
| "srli.w $t0, %[cblk], 4 \n\t" | ||
| "xvldrepl.w $xr0, %[step], 0 \n\t" |
There was a problem hiding this comment.
Is there any reason not to use xvreplgr2vr.w here?
| OPJ_INT32* ptr1 = datap + j * cblk_w; | ||
| OPJ_INT32* ptr2 = tiledp + j * (OPJ_SIZE_T)tile_w; | ||
| OPJ_UINT32 step_size = 0; | ||
| asm volatile |
2 participants
With the bench_dwt utility, on loongarch64:
before changes: 30.990 s
with LASX optimization: 3.334 s