tape-out

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Here are 6 public repositories matching this topic...

jasonlin316 / RISC-V-CPU

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A RISC-V 5-stage pipelined CPU that supports vector instructions. Tape-out with U18 technology.

processor vector verilog chip risc-v riscv32 gate-level place-and-route tape-out

Updated Dec 2, 2019
Verilog

alexxony / Memory-Subsystem-Data-Tiling-Engine

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RTL design of a double-buffered SRAM-to-systolic-array tiling engine with bank-conflict resolution and WS/OS data reuse (tape-out-ready sign-off)

rtl systemverilog tape-out memory-subsystem systolic-array

Updated May 31, 2026
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SriKondapaturi / tt-um-govardhana-adpll

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Two-tile all-digital PLL taped out on TinyTapeout SKY26c (SkyWater 130nm). Ring-oscillator DCO, counter-based TDC, PI loop filter. Locks 10 MHz reference to programmable output frequency up to 63x.

asic rtl verilog pll ring-oscillator physical-design tape-out adpll skywater openlane sky130 chip-design tinytapeout opensiliconhub digital-pll

Updated Sep 9, 2026
Verilog

Tape-Out / to2610-gpu

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A small parallel-compute chip for the ECOS 2610 shuttle: tiny-gpu with four cores of four threads, loaded and started by a host over SPI.

gpu verilog tape-out ics55

Updated Oct 15, 2026
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Tape-Out / to2610-kvc

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A Linux-capable RV32IMA chip with an Sv32 MMU for the ECOS 2610 shuttle: the KianV SoC as taped out on GF180MCU, booting OpenSBI and Linux from SPI flash into SDRAM.

linux verilog risc-v tape-out ics55

Updated Oct 15, 2026
Shell

Tape-Out / to2610-npu

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The to2610-kvc Linux chip with a small MLP inference engine on its bus for the ECOS 2610 shuttle: a kernel driver and MNIST through /dev/npu.

linux verilog risc-v npu tape-out ics55

Updated Oct 15, 2026
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