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dreamsourcelab-dslogic: add DSLogic U2Basic (2a0e:0029) LA support - #2
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thiesmoeller wants to merge 9 commits into
Draft
thiesmoeller wants to merge 9 commits into
thiesmoeller wants to merge 9 commits into
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thiesmoeller
changed the title
- Use DSL_CTL_BULK_WR for fpga_configure() on U2Basic\n- Configure before U2Basic START to avoid stale/test-pattern output\n- Harden transfer teardown to avoid double-free on repeated captures
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Summary
Add support for DreamSourceLab DSLogic U2Basic (
VID:PID 2a0e:0029) in thedreamsourcelab-dslogicdriver, limited to logic-analyzer functionality used by sigrok/PulseView.Scope
2a0e:0029)contrib/60-libsigrok.rulesstart/stop)I2C_REGpathExplicitly out of scope (for this PR)
Validation
Tested on hardware
2a0e:0029:sigrok-cli --scandetects U2BasicThis PR remains draft for further hardware soak testing.