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tancheng / VectorCGRA Public template

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[Feature] Implement DMA support#293

Open

BenkangPeng wants to merge 13 commits into

tancheng:mastertancheng/VectorCGRA:masterfrom

BenkangPeng:dma-cgraBenkangPeng/VectorCGRA:dma-cgraCopy head branch name to clipboard

Conversation Commits13 (13)Checks Files changed

Open

[Feature] Implement DMA support#293
BenkangPeng wants to merge 13 commits into
tancheng:masterfrom
BenkangPeng:dma-cgra

Commits

Commits on Jun 4, 2026

Add the DmaEngine implementation and the test.
BenkangPeng
committed
[Test] Update the test of DmaEngine.
BenkangPeng
committed
Add DMA support to DataMemControllerRTL and implement corresponding tests.
BenkangPeng
committed
Add the dma ports into CgraTemplateRTL
BenkangPeng
committed
Wrap the Cgra and Dma into one single module.
BenkangPeng
committed
[Script] Add the local_CI script file
BenkangPeng
committed
Update .gitignore to ignore the log file
BenkangPeng
committed
[Test] Add the test for CgraDmaRTL
BenkangPeng
committed
[Fix] Fix the bit mismatch error between dma_idx and num_xbar_in_ports.
BenkangPeng
committed
[Doc] Add some comments
BenkangPeng
committed
[Fix] Fix the bit mismatch by type convertion
BenkangPeng
committed
Move some constant into common header file
BenkangPeng
committed
[Refactor] Wrap the signals between dma and dram with SendIfcRTL and RecvIfcRTL. Replace `mem` with `dram` for clarity.
BenkangPeng
committed

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