Fix riscv SIMD detection#52
Conversation
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Nice, thanks for the PR. One note on the SIMD fallback: I'm not really happy with that, as the auto vectorizer doesn't recognize the pattern but generates scalar code (the last time I tested this). This is much slower even than using single rays. Therefore I'd rather not advertise this code path explicitly in the README. In all other regards the PR looks good to me, though! One thought I had was to add a generic vector code path using gcc's If you could adapt the note in the readme I'd be really happy to merge the PR though! |
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Thanks for the feedback. You're right, this patch is only meant to fix target detection and get the project compiling correctly on RISC-V systems, not to advertise the current packet fallback. I updated the README note accordingly, and I appreciate the guidance. |
Why
Visionaray already has a builtin no-SIMD fallback that can serve as a conservative baseline for
riscv64, but its architecture and SIMD detection currently rely on raw host compiler macros. In practice this lets hostx86_64architecture and SSE state leak into simulated or cross-targetriscv64builds, which selects the wrong backend and includes the wrong intrinsics headers.What changed
include/visionaray/math/simd/intrinsics.hto recognize__riscvexplicitly and distinguishriscv32fromriscv64.riscv64, on the existing builtin no-SIMD fallback instead of inheriting host SIMD state.include/visionaray/math/detail/math.hso x86 intrinsics headers andrdtscare only used on x86/x64, while non-x86 targets fall back to a conservative generic timer path.README.mdwith a generic cross-compilation note so target CPU flags do not accidentally follow the build host.Verification
cmake -S . -B build-native-min -G Ninja -DVSNRAY_ENABLE_CUDA=OFF -DVSNRAY_ENABLE_COMMON=OFF -DVSNRAY_ENABLE_VIEWER=OFF -DVSNRAY_ENABLE_EXAMPLES=OFF -DVSNRAY_ENABLE_UNITTESTS=OFFcmake --build build-native-min --parallel 4cmake --install build-native-min --prefix build-native-min\installriscv64cross-build indockcross/linux-riscv64for a minimal consumer that includesvisionaray/math/simd/simd.handvisionaray/math/vector.h.filereadelf -hqemu-riscv64and confirmed the vector arithmetic smoke test prints:visionaray-ok 5 7 9 10 21 36Notes
This is a conservative portability patch. It does not add RVV or any other RISC-V SIMD backend. The goal is to make
riscv64select Visionaray's existing builtin fallback correctly and to prevent hostx86_64intrinsics or timing code from leaking into cross-target validation.