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2 changes: 1 addition & 1 deletion src/arch/aarch64/cpu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -274,7 +274,7 @@ pub fn get_target_cpu(_irq: usize, zone_id: usize) -> usize {
find_zone(zone_id)
.unwrap()
.read()
.cpu_set
.cpu_set()
.first_cpu()
.unwrap()
}
2 changes: 1 addition & 1 deletion src/arch/aarch64/hypercall.rs
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,7 @@ impl<'a> HyperCall<'a> {
// ipa->hpa->hva
let hpa = unsafe {
zone.read()
.gpm
.gpm()
.page_table_query(ivc_info_ipa as _)
.unwrap()
.0
Expand Down
19 changes: 13 additions & 6 deletions src/arch/aarch64/ivc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -151,16 +151,20 @@ impl From<&HvIvcConfig> for IvcRecord {

impl Zone {
pub fn ivc_init(&mut self, ivc_configs: &[HvIvcConfig]) {
let mut inner = self.write();
for ivc_config in ivc_configs {
// is_new is ok to remove
if let Ok((_, start_paddr)) = insert_ivc_record(ivc_config, self.id as _) {
if let Ok((_, start_paddr)) = insert_ivc_record(ivc_config, self.id() as _) {
info!(
"ivc init: zone {}'s shared mem begins at {:x}, ipa is {:x}",
self.id, start_paddr, ivc_config.shared_mem_ipa
self.id(),
start_paddr,
ivc_config.shared_mem_ipa
);
let rw_sec_size: usize = ivc_config.rw_sec_size as usize;
let out_sec_size: usize = ivc_config.out_sec_size as usize;
self.gpm
inner
.gpm_mut()
.insert(MemoryRegion::new_with_offset_mapper(
ivc_config.shared_mem_ipa as _,
start_paddr,
Expand All @@ -174,7 +178,8 @@ impl Zone {
} else {
MemFlags::READ
};
self.gpm
inner
.gpm_mut()
.insert(MemoryRegion::new_with_offset_mapper(
ivc_config.shared_mem_ipa as usize + rw_sec_size + i * out_sec_size,
start_paddr + rw_sec_size + i * out_sec_size,
Expand All @@ -183,7 +188,7 @@ impl Zone {
))
.unwrap();
}
self.mmio_region_register(
inner.mmio_region_register(
ivc_config.control_table_ipa as _,
PAGE_SIZE,
mmio_ivc_handler,
Expand All @@ -193,7 +198,9 @@ impl Zone {
return;
}
}
IVC_INFOS.lock().insert(self.id, IvcInfo::from(ivc_configs));
IVC_INFOS
.lock()
.insert(self.id(), IvcInfo::from(ivc_configs));
}
}

Expand Down
4 changes: 2 additions & 2 deletions src/arch/aarch64/trap.rs
Original file line number Diff line number Diff line change
Expand Up @@ -390,10 +390,10 @@ fn handle_psci_smc(
PsciFnId::PSCI_CPU_ON_32 | PsciFnId::PSCI_CPU_ON_64 => psci_emulate_cpu_on(regs),
PsciFnId::PSCI_SYSTEM_OFF => {
let zone = this_zone();
let zone_id = zone.read().id;
let zone_id = zone.id();
let is_root = is_this_root_zone();

for cpu_id in zone.read().cpu_set.iter_except(this_cpu_data().id) {
for cpu_id in zone.read().cpu_set().iter_except(this_cpu_data().id) {
let target_cpu = get_cpu_data(cpu_id);
let _lock = target_cpu.ctrl_lock.lock();
target_cpu.zone = None;
Expand Down
36 changes: 25 additions & 11 deletions src/arch/aarch64/zone.rs
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@ use crate::{

impl Zone {
pub fn pt_init(&mut self, mem_regions: &[HvConfigMemoryRegion]) -> HvResult {
let mut inner = self.write();
// The first memory region is used to map the guest physical memory.

for mem_region in mem_regions.iter() {
Expand All @@ -34,29 +35,41 @@ impl Zone {
}
match mem_region.mem_type {
MEM_TYPE_RAM | MEM_TYPE_IO => {
self.gpm.insert(MemoryRegion::new_with_offset_mapper(
mem_region.virtual_start as GuestPhysAddr,
mem_region.physical_start as HostPhysAddr,
mem_region.size as _,
flags,
))?
inner
.gpm_mut()
.insert(MemoryRegion::new_with_offset_mapper(
mem_region.virtual_start as GuestPhysAddr,
mem_region.physical_start as HostPhysAddr,
mem_region.size as _,
flags,
))?
}
MEM_TYPE_VIRTIO => {
self.mmio_region_register(
inner.mmio_region_register(
mem_region.physical_start as _,
mem_region.size as _,
mmio_virtio_handler,
mem_region.physical_start as _,
);
}
_ => {
// hvisor-tool will check memory type. So only root linux can reach here.
panic!("Unsupported memory type: {}", mem_region.mem_type)
// hvisor-tool should check memory type in advance.
if self.id() == 0 {
panic!("Unsupported memory type: {}", mem_region.mem_type);
}
return hv_result_err!(
EINVAL,
format!(
"zone {} has unsupported memory type: {}",
self.id(),
mem_region.mem_type
)
);
}
}
}

info!("VM stage 2 memory set: {:#x?}", self.gpm);
info!("VM stage 2 memory set: {:#x?}", inner.gpm());
Ok(())
}

Expand All @@ -65,10 +78,11 @@ impl Zone {
mem_regions: &[HvConfigMemoryRegion],
hv_config: &HvArchZoneConfig,
) -> HvResult {
let mut inner = self.write();
// Create a new stage 2 page table for iommu.
// Only map the memory regions that are possible to be accessed by devices as DMA buffer.

let pt = self.iommu_pt.as_mut().unwrap();
let pt = inner.iommu_pt_mut().unwrap();
let flags = MemFlags::READ | MemFlags::WRITE;
for mem_region in mem_regions.iter() {
match mem_region.mem_type {
Expand Down
2 changes: 1 addition & 1 deletion src/arch/loongarch64/cpu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -169,7 +169,7 @@ pub fn get_target_cpu(irq: usize, zone_id: usize) -> usize {
find_zone(zone_id)
.unwrap()
.read()
.cpu_set
.cpu_set()
.first_cpu()
.unwrap()
}
4 changes: 2 additions & 2 deletions src/arch/loongarch64/trap.rs
Original file line number Diff line number Diff line change
Expand Up @@ -608,14 +608,14 @@ pub fn _vcpu_return(ctx: usize) {
} else {
// since LVZ use GID=0 for hypervisor TLB, we cannot use zone id 0 here
// so we add it by 1 - wheatfox
vm_id = z.unwrap().read().id + 1;
vm_id = z.unwrap().id() + 1;
}
gstat::set_gid(vm_id);
gstat::set_pgm(true);
trace!(
"loongarch64: _vcpu_return: set hardware Guest ID to {} for zone {}",
vm_id,
z.unwrap().read().id
z.unwrap().id()
);
// Configure guest TLB control
gtlbc::set_use_tgid(true);
Expand Down
69 changes: 39 additions & 30 deletions src/arch/loongarch64/zone.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,39 +40,46 @@ use spin::Mutex;

impl Zone {
pub fn pt_init(&mut self, mem_regions: &[HvConfigMemoryRegion]) -> HvResult {
let mut inner = self.write();
// use the new zone config type of init
for region in mem_regions {
trace!("loongarch64: pt_init: process region: {:#x?}", region);
let mem_type = region.mem_type;
match mem_type {
MEM_TYPE_RAM => {
self.gpm.insert(MemoryRegion::new_with_offset_mapper(
region.virtual_start as GuestPhysAddr,
region.physical_start as HostPhysAddr,
region.size as _,
MemFlags::READ | MemFlags::WRITE | MemFlags::EXECUTE,
))?;
inner
.gpm_mut()
.insert(MemoryRegion::new_with_offset_mapper(
region.virtual_start as GuestPhysAddr,
region.physical_start as HostPhysAddr,
region.size as _,
MemFlags::READ | MemFlags::WRITE | MemFlags::EXECUTE,
))?;
}
MEM_TYPE_IO => {
self.gpm.insert(MemoryRegion::new_with_offset_mapper(
region.virtual_start as GuestPhysAddr,
region.physical_start as HostPhysAddr,
region.size as _,
MemFlags::READ | MemFlags::WRITE | MemFlags::IO,
))?;
inner
.gpm_mut()
.insert(MemoryRegion::new_with_offset_mapper(
region.virtual_start as GuestPhysAddr,
region.physical_start as HostPhysAddr,
region.size as _,
MemFlags::READ | MemFlags::WRITE | MemFlags::IO,
))?;
}
MEM_TYPE_VIRTIO => {
info!(
"loongarch64: pt_init: register virtio mmio region: {:#x?}",
region
);
self.gpm.insert(MemoryRegion::new_with_offset_mapper(
region.virtual_start as GuestPhysAddr,
region.physical_start as HostPhysAddr,
PAGE_SIZE, // since we only need 0x200 size for virtio mmio, but the minimal size is PAGE_SIZE
MemFlags::USER, // we use the USER as a hint flag for invalidating this stage-2 PTE
))?;
self.mmio_region_register(
inner
.gpm_mut()
.insert(MemoryRegion::new_with_offset_mapper(
region.virtual_start as GuestPhysAddr,
region.physical_start as HostPhysAddr,
PAGE_SIZE, // since we only need 0x200 size for virtio mmio, but the minimal size is PAGE_SIZE
MemFlags::USER, // we use the USER as a hint flag for invalidating this stage-2 PTE
))?;
inner.mmio_region_register(
region.physical_start as _,
region.size as _,
mmio_virtio_handler,
Expand All @@ -92,14 +99,14 @@ impl Zone {
// 3. chip configuration

info!("loongarch64: pt_init: add mmio handler for 0x1fe0_xxxx mmio region");
self.mmio_region_register(0x1fe0_0000, 0x3000, loongarch_generic_mmio_handler, 0x1234);
inner.mmio_region_register(0x1fe0_0000, 0x3000, loongarch_generic_mmio_handler, 0x1234);

info!("zone stage-2 memory set: {:#x?}", self.gpm);
info!("zone stage-2 memory set: {:#x?}", inner.gpm());
unsafe {
// test the page table by querying the first page
if mem_regions.len() > 0 {
let r = self
.gpm
let r = inner
.gpm()
.page_table_query(mem_regions[0].virtual_start as GuestPhysAddr);
debug!("query 0x{:x}: {:#x?}", mem_regions[0].virtual_start, r);
// check whether the first page is mapped
Expand Down Expand Up @@ -674,13 +681,15 @@ pub fn loongarch_generic_mmio_handler(mmio: &mut MMIOAccess, arg: usize) -> HvRe

impl Zone {
pub fn page_table_emergency(&mut self, vaddr: usize, size: usize) -> HvResult {
self.gpm.insert(MemoryRegion::new_with_offset_mapper(
vaddr as GuestPhysAddr,
vaddr as HostPhysAddr,
size as _,
MemFlags::READ | MemFlags::WRITE | MemFlags::IO,
))?;
self.gpm.delete(vaddr as GuestPhysAddr, size)
self.write()
.gpm_mut()
.insert(MemoryRegion::new_with_offset_mapper(
vaddr as GuestPhysAddr,
vaddr as HostPhysAddr,
size as _,
MemFlags::READ | MemFlags::WRITE | MemFlags::IO,
))?;
self.write().gpm_mut().delete(vaddr as GuestPhysAddr, size)
}

pub fn arch_zone_pre_configuration(&mut self, config: &HvZoneConfig) -> HvResult {
Expand Down
2 changes: 1 addition & 1 deletion src/arch/riscv64/cpu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -247,7 +247,7 @@ pub fn get_target_cpu(_irq: usize, zone_id: usize) -> usize {
find_zone(zone_id)
.unwrap()
.read()
.cpu_set
.cpu_set()
.first_cpu()
.unwrap()
}
19 changes: 11 additions & 8 deletions src/arch/riscv64/zone.rs
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,7 @@ use crate::{
};
impl Zone {
pub fn pt_init(&mut self, mem_regions: &[HvConfigMemoryRegion]) -> HvResult {
let mut inner = self.write();
for mem_region in mem_regions.iter() {
let mut flags = MemFlags::READ | MemFlags::WRITE;
// Note: in riscv, base flags are D/A/G/U/W/X, some mem attributes are embedded in the PMA.
Expand All @@ -31,15 +32,17 @@ impl Zone {
}
match mem_region.mem_type {
MEM_TYPE_RAM | MEM_TYPE_IO => {
self.gpm.insert(MemoryRegion::new_with_offset_mapper(
mem_region.virtual_start as GuestPhysAddr,
mem_region.physical_start as HostPhysAddr,
mem_region.size as _,
flags,
))?
inner
.gpm_mut()
.insert(MemoryRegion::new_with_offset_mapper(
mem_region.virtual_start as GuestPhysAddr,
mem_region.physical_start as HostPhysAddr,
mem_region.size as _,
flags,
))?
}
MEM_TYPE_VIRTIO => {
self.mmio_region_register(
inner.mmio_region_register(
mem_region.physical_start as _,
mem_region.size as _,
mmio_virtio_handler,
Expand All @@ -51,7 +54,7 @@ impl Zone {
}
}
}
info!("VM stage 2 memory set: {:#x?}", self.gpm);
info!("VM stage 2 memory set: {:#x?}", inner.gpm());
Ok(())
}

Expand Down
6 changes: 3 additions & 3 deletions src/arch/x86_64/hypercall.rs
Original file line number Diff line number Diff line change
Expand Up @@ -38,7 +38,7 @@ impl<'a> HyperCall<'a> {
unsafe {
this_zone()
.read()
.gpm
.gpm()
.page_table_query(config_addr as _)
.unwrap()
.0 as _
Expand All @@ -49,7 +49,7 @@ impl<'a> HyperCall<'a> {
let magic_version = unsafe {
this_zone()
.read()
.gpm
.gpm()
.page_table_query(magic_version as usize)
.unwrap()
.0 as *mut u64
Expand All @@ -73,7 +73,7 @@ impl<'a> HyperCall<'a> {
let virtio_irq = unsafe {
this_zone()
.read()
.gpm
.gpm()
.page_table_query(virtio_irq as usize)
.unwrap()
.0 as *mut u32
Expand Down
2 changes: 1 addition & 1 deletion src/arch/x86_64/ipi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -91,7 +91,7 @@ pub fn send_ipi(value: u64) -> HvResult {
let dest = get_cpu_id(value.get_bits(32..=39) as usize);
let cnt = value.get_bits(40..=63) as u32;

let mut cpu_set = this_zone().read().cpu_set;
let mut cpu_set = this_zone().cpu_set();
let cpu_id = this_cpu_id();
let mut dest_set = CpuSet::new(cpu_set.max_cpu_id, 0);

Expand Down
2 changes: 1 addition & 1 deletion src/arch/x86_64/mmio.rs
Original file line number Diff line number Diff line change
Expand Up @@ -258,7 +258,7 @@ impl ModRM {
}

fn gpa_to_hpa(gpa: GuestPhysAddr) -> HvResult<HostPhysAddr> {
let (hpa, _, _) = unsafe { this_zone().read().gpm.page_table_query(gpa)? };
let (hpa, _, _) = unsafe { this_zone().read().gpm().page_table_query(gpa)? };
Ok(hpa)
}

Expand Down
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