Add packetizer cocotb regression coverage#1425
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- Introduced tests for reset behavior in FIFO and RAM modules, ensuring proper handling of pending entries and state clearing. - Added tests for simultaneous read/write operations in FIFO and RAM, verifying correct data handling during collisions and near-full conditions. - Implemented tests for starvation resistance in arbiters, ensuring fair request handling under contention. - Enhanced watchdog tests to cover chattered keepalive sequences, ensuring timeout behavior is correctly implemented. - Added cross-port collision tests in dual-port RAM, verifying correct data visibility and handling during simultaneous writes. - Introduced burst read gap tests in synchronizer FIFO, ensuring proper data transfer during paused reads and reset conditions.
… tests - Added a simple validVec active-lane request mask. - Kept packet atomicity: selected lane is held through the packet and advances on TLAST. - Added bounded idle-lane skipping: if the selected lane is empty but some active lane has data, the mux advances one lane per clock instead of parking indefinitely. - Tightened the dual-lane RX test to assert no FSM error, the full six-word output, and both frame TLASTs.
…s, not just FSM/mux state. Previously the reset could restart parsing while stale overflow-era payload still drained ahead of recovery traffic.
test_CoaXPressRx.py: promoted four-lane short-frame/boundary tests and repeated single-line frame coverage; reclassified heavy overflow recovery checks under RUN_STRESS_TESTS=1. test_CoaXPressRxHsFsm.py: promoted repeated single-line frame bench. test_CoaXPressCore.py: made the RX backpressure counter test part of normal coverage with a workload that actually overflows data FIFO and asserts RxFsmErrorCnt stays zero. Updated CoaXPress README and _meta docs to remove stale known-issue guidance.
… and require EOP before pulsing cfgMaster. CoaXPressRxLane.vhd (line 468): heartbeat packets now validate repeated-byte payload words, CRC, and EOP before pulsing heatbeatMaster.
…real CRC. Updated the CoaXPress README and _meta docs to remove the stale ACK limitation and document the remaining real gaps.
… states after the declared DSize payload words, instead of returning to idle immediately and accepting a new SOP early. The CRC covers stream ID, packet tag, size, and payload words. Payload still forwards as it arrives, so this enforces packet framing before the next packet rather than buffering and dropping bad payloads.
…ser errors into the existing rxFsmError output alongside the high-speed FSM error. That means malformed packet trailers, including bad stream CRC, now reach the existing core RxFsmErrorCnt software counter. Updated tests cover: leaf rxError pulse on bad stream trailer top-level rxFsmError pulse and recovery after bad stream CRC core RxFsmErrorCnt increment on bad stream CRC, with later clean-frame recovery
CoaXPressRxLane now emits event payload words on eventMaster. CoaXPressRx crosses that event stream into cfgClk. Existing eventAck/eventTag remains trailer-gated after CRC/EOP validation. CXPoF bridge status: /Q/ status via seqValid/seqData. /E/ status via rxError/rxAbort. HKP status via hkpValid/hkpData/hkpEop. Existing reconstructed CXP word-stream behavior is preserved.
CoaXPressRxLane now uses an explicit distributed surf.SimpleDualPortRam as a bounded event payload store in CoaXPressRxLane.vhd. Event payload words are written into that RAM, then released on eventMaster only after CRC and EOP pass. Bad CRC events and oversized events do not leak payload. Also updated test_CoaXPressRxLane.py to assert: valid multi-word event payload is released after validation bad-CRC event does not release payload oversized event is rejected parser recovers for a later clean event
…VHDL description header: maxCount is intended to be programmed during init or reset. If changed at runtime, assert rst afterward. Discard output history for at least one newly configured delay interval before relying on dout. Added a fuller module description covering RAM mode, address wrapping, en, DO_REG_G, and delay formula. Also aligned test_SlvDelayRam.py with that contract: it now reprograms maxCount, resets, discards the post-reset history interval, then verifies stable traffic at the new delay.
Changed CoaXPressOverFiberBridgeRx.vhd (line 42) to add: /Q/ sequence tracking with seqExpected, seqError, and seqErrorExpected classified rxErrorCode causes for sequence mismatch, idle /E/, payload abort, bad control, overwrite, and malformed HKP HKP structural parsing via hkpSof, hkpWordCount, hkpError, plus existing raw hkpData/hkpEop Propagated the new status ports through CoaXPressOverFiberBridge.vhd (line 54) and tied them off in the GT wrapper instances. Updated bridge tests in test_CoaXPressOverFiberBridgeRx.py (line 160) and test_CoaXPressOverFiberBridge.py (line 184),
…ing: CXP reconstructed word K masks CXPoF XGMII control masks CXPoF SOP control bit positions/values CXPoF low-speed payload control codes CXPoF terminate suffix pattern CXPoF RX error-code constants Then replaced the inline literals in CoaXPressOverFiberBridgeRx.vhd (line 140) and CoaXPressOverFiberBridgeTx.vhd (line 114). I also mirrored the status constants into coaxpress_test_utils.py (line 56) and updated the bridge tests to use those names.
…de-up command decoder. Changes: Added package helpers/constants in CoaXPressPkg.vhd (line 92): cxpIsKCode, cxpKCodeMask, cxpHkpType, HKP type constants, and CXPOF_RX_ERR_HKP_BAD_K_CODE_C. Extended CoaXPressOverFiberBridgeRx.vhd (line 48) with hkpKCodeMask, hkpKCodeValid, and hkpType. Tightened HKP semantics: HKP now requires all-data nGMII control flags, validates each byte as a legal 8b/10b K-code value, classifies known CXP K-code words, and reports invalid K-code bytes separately from malformed control masks. Propagated new ports through the bridge and GT wrappers. Updated tests/docs to remove the “higher-level HKP command decoding” gap. HKP is now documented as High-Speed K-Code Payload validation/classification per the CXPoF spec reference
- Introduced CoaXPressOverFiberBridgeRxStatusWrapper and CoaXPressOverFiberBridgeStatusWrapper VHDL files to provide cocotb-facing status interfaces for the CoaXPressOverFiberBridge components. - Updated CoaXPressOverFiberGthUsIpWrapper and CoaXPressOverFiberGtyUsIpWrapper to integrate the new bridge RX status signals. - Implemented CoaXPressOverFiberBridgeAxiL Python class to expose bridge RX status via AXI-Lite interface, including sticky status bits, last observed sequence and HKP fields, and event counters. - Added tests for the new AXI-Lite interface to validate status register functionality and behavior under various conditions. - Updated README documentation to reflect the new status contract and register map.
…nto coaxpress-tests-2
Bug: The CTRL_ACK_S state in CoaXPressRxLane.vhd unconditionally expects 3 payload words before CRC. Write acknowledgments from the camera only have 2 words (ack_code + size=0, no data). After commit 10d5de3 added CRC/EOP validation, the state machine consumes the CRC as "data", then fails to find the real CRC → silently drops the response → CoaXPressConfig times out → SRP status 0x1. Why reads work: Read responses include all 3 words (ack_code + size=4 + read_data) so the state machine parses them correctly. Why ConnectionReset() works: It uses cmd.post() (fire-and-forget) which doesn't check the transaction response. Fix (in CoaXPressRxLane.vhd:371-378): At ackCnt=1, check if rxData(31 downto 8) = 0 (DSize=0). If so, transition directly to CTRL_ACK_CRC_S without waiting for a data word that will never arrive.
Key changes: CoaXPressRxLane now emits an in-order trailer verdict marker with SSI EOFE on malformed stream CRC/EOP. CoaXPressRxWordPacker now has proper AXI-stream handshaking and preserves EOFE on packed tLast. CoaXPressRxHsFsm now holds only the final packed EOF beat until the trailer verdict arrives, then applies EOFE before releasing it. packOut and the named trailer/hold state are now RegType members in CoaXPressRxHsFsm.vhd (line 103). I left the remaining locals as short-lived arithmetic/loop temporaries. Fixed duplicate error accounting: the lane reports malformed trailer errors, while the FSM uses the trailer verdict only to annotate EOFE.
…nto coaxpress-tests-2
…dling and update focus module summary
The issue points at the stricter coaxpress-tests-2 control-ACK parser: VersionUsedCmd writes can get a camera ACK shape that either carries success in P0 only (0x00000001/0x00000004) or omits the explicit zero-size word before CRC/EOP. The current parser could treat that as nonzero status or fail to complete the ACK, which surfaces in Rogue as the hardware register-bus transaction error. Changed: CoaXPressRxLane.vhd (line 187): normalize repeated-byte and P0-only success ACK codes to zero status. CoaXPressRxLane.vhd (line 392): accept write ACKs that go code + CRC + EOP without an explicit zero-size word. test_CoaXPressRxLane.py (line 462): added regression coverage for both compatibility ACK shapes.
…TRIG, IO_ACK, MARKER, generic K-code) through the AXI-Lite packed HKP status register and counters.
…y to break the long logic path.
- Introduced `AxiStreamDepacketizer2Wrapper.vhd` to provide a Cocotb-facing interface for the `surf.AxiStreamDepacketizer2` entity. - Introduced `AxiStreamPacketizer2Wrapper.vhd` to provide a Cocotb-facing interface for the `surf.AxiStreamPacketizer2` entity. - Created test utilities in `packetizer_test_utils.py` to facilitate testing of AXI Stream interfaces. - Implemented tests for the `AxiStreamDepacketizer2` in `test_AxiStreamDepacketizer2.py` to validate packet processing and output correctness. - Implemented tests for the `AxiStreamPacketizer2` in `test_AxiStreamPacketizer2.py` to ensure proper packetization of input streams. - Added an `__init__.py` file to the `tests/protocols/packetizer` directory for package initialization.
… handling - Updated AxiStreamBytePackerWrapper to support configurable slave and master byte widths. - Adjusted input and output signal definitions to reflect new byte-width parameters. - Added assertions to ensure master byte width is not less than slave byte width. - Modified test_AxiStreamBytePacker to accommodate various input/output byte-width pairs. - Introduced new tests for edge cases, including idle gaps and output ready signal handling. - Enhanced test coverage for AxiStreamDepacketizer and AxiStreamPacketizer to validate new functionality. - Added tests for split sequences, partial last beats, and interleaved destination states.
- Implemented AxiStreamPacketizer2LoopbackWrapper in VHDL to facilitate loopback testing between packetizer and depacketizer. - Enhanced packetizer and depacketizer test utilities with backpressure handling. - Added tests for packetizer and depacketizer to validate behavior under various conditions, including CRC modes and backpressure scenarios. - Introduced a new test for the loopback wrapper to ensure proper handling of split frames and backpressure. - Updated existing tests to improve coverage and ensure compliance with new functionality.
- Implemented `test_AxiStreamDepacketizer2Crc.py` to validate CRC error handling in the AxiStream depacketizer. - Created `test_AxiStreamDepacketizer2LinkDrop.py` to check link drop behavior during frame processing. - Enhanced `test_AxiStreamPacketizer.py` to utilize new assertion functions for packetized beats. - Updated `test_AxiStreamPacketizer2.py` to include tests for packetization with sequence counter wrapping. - Introduced `test_AxiStreamPacketizer2Loopback.py` to validate loopback functionality with various destination settings. - Added `test_AxiStreamPacketizer2SeqWrap.py` to verify sequence counter wrapping behavior in packetization.
This was referenced May 28, 2026
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| rxErrorCodeEnum = { | ||
| 0x0: 'None', | ||
| 0x1: 'BadControl', | ||
| 0x2: 'Overwrite', | ||
| 0x3: 'IdleError', | ||
| 0x4: 'PayloadAbort', | ||
| 0x5: 'SeqMismatch', | ||
| 0x6: 'HkpMalformed', | ||
| 0x7: 'HkpBadKCode', | ||
| } |
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| # Test methodology: | ||
| # - Sweep: Use the standalone `AxiStreamPacketizer2` wrapper in CRC-disabled | ||
| # mode with an 8-byte stream width and a reduced packet-size limit for the | ||
| # split-frame case. |
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Description
Adds focused cocotb regression coverage for the AXI Stream packetizer family, including byte packing, packetizer/depacketizer, packetizer2/depacketizer2, CRC/error handling, link-drop behavior, loopback behavior, and sequence wrap handling.
Details
This packetizer-focused slice adds thin VHDL wrappers under
protocols/packetizer/wrappers/so cocotb can drive and observe the existing RTL through flattened AXI Stream ports without embedding stimulus in VHDL. The wrappers cover:AxiStreamBytePackerAxiStreamPacketizerandAxiStreamDepacketizerAxiStreamPacketizer2andAxiStreamDepacketizer2The new Python regression support under
tests/protocols/packetizer/adds shared packetizer helpers and directed tests for:The branch also adds/updates regression planning notes for the packetizer work under
docs/plans/rtl-regression/.Merge after #1414.