zixuanSheng_COD_lab

计组研讨课实验仓库

finished:

prj1:registers,alu;

prj2:single-cycle_mips_simple_CPU,multi-cycle_mips_simple_CPU;

prj3:multi-cycle_mips_custom_CPU;

prj4:multi-cycle_riscv_custom_CPU;

prj5:dma,dnn,turbo