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1 change: 1 addition & 0 deletions dm/tools/patch_nso.py
Original file line number Diff line number Diff line change
Expand Up @@ -1184,6 +1184,7 @@ def stdalloc_gates():
region_obs.append((UE_CALL, OBS_UE_MALLOC, f'{NOP:08x}', 'FMallocBinned3 constructor call (cut): the object in x0; the host puts its allocator\'s vtable in (hle_uemalloc.c)'))
# Unreal's engine region (above): the gate on the store of its size, which the callback changes in that register and x1, the size the call asks for
if UE_REGION is not None:
assert UE_REGION_REG is not None, 'engine region gate has no size register'
assert UE_REGION not in kinds and not any(lo <= UE_REGION < hi for wseg in windows for lo, hi in [(wseg[0].address, wseg[-1].address + 4)]), f'engine region gate conflicts with a rewrite site {UE_REGION:#x}'
region_obs.append((UE_REGION, OBS_UE_REGION | UE_REGION_REG << 8, f'{struct.unpack_from("<I", IMG, UE_REGION)[0]:08x}',
f'Unreal\'s engine region: its size in x{UE_REGION_REG}, stored before nninitStartup reserves it; the host gives what the alias region has room for (hle_svc.c)'))
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2 changes: 1 addition & 1 deletion dm/tools/ue_region.py
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@ def size_store(img, call, start, md):
vals, stores, x1_at = {}, [], None # register → ('c', constant) | ('page',) | ('lo', the low 12 bits of an address)
for ins in md.disasm(img[a:call], a):
ops, m = ins.operands, ins.mnemonic
reg = lambda o: ins.reg_name(o.reg)
reg = lambda o, ins=ins: ins.reg_name(o.reg)
if m == 'str' and reg(ops[0]).startswith('x') and ops[1].type == ARM64_OP_MEM and not ins.writeback and ops[1].mem.index == 0: # str xS, [xB, #o]
stores.append((ins.address, int(reg(ops[0])[1:]) if reg(ops[0]) != 'xzr' else None, ops[1].mem.disp, vals.get(reg(ops[0]))))
continue
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