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PLOP3 on register sign bits translates, so add.sat / sub.sat do (chain change) - #2057
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…re_orin.py runs about 190 operations, each the GPU compiler's own machine code for one PTX operation, through the translator, spirv-cross, the chain's MSL rewrites and Metal on this Mac's GPU, and compares every output word with what a Jetson Orin (sm_87) computed from the same 1,024 input rows. The translator tests checked the MSL a few encodings give, not the values; this one finds the FSETP.NE, SHFL lane, F2FP, rounding-mode and signed-zero differences the tracking issue lists, which KNOWN names until each fix takes its entry out. dm/gfx/tools/ampere_orin/capture.py records the fixture on any Linux machine with an Ampere GPU and NVIDIA's driver, with no toolkit or compiler on either side
…ules with its functions, so a rewrite that uses one (struct in PR seedds#1902's hfma_msl) runs as it does in a build instead of raising NameError
…rin's results: for add.sat.s32 and sub.sat.s32 the GPU compiler decides overflow with PLOP3.LUT on the sign bits of three general registers (opcode 0x21f), which the translator didn't implement, so those shaders stopped with 'Ampere instruction 21f'. APlop3Sign reads the registers as ALU sources a (24), b (32) and c (64), turns each into R < 0 and runs the predicate PLOP3's truth-table code, the first LUT at bits 72..79 for the first destination and the second at 16..23 for the second, fields taken from nvdisasm's decoding of the fixture since Mesa NAK has no encoding for this form. test_dmsh_ampere_orin.py's iadd_sat and isub_sat failed to translate before and match the Orin in all 1,024 lanes now, so they leave KNOWN; the other dmsh tests are as on main; chain 813df7a0ab79
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…anch's translator rebuilt from its own source; chain 43a1a38ab68b
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Part of the Ampere accuracy series (#2040). It depends on #2041 for the test: the commits before this PR's own are #2041's and drop out once it lands, so this PR's own change is the last commit.
What and why
For
add.sat.s32andsub.sat.s32, ptxas emits an IADD3, then twoPLOP3.LUT Pd, PT, Ra.SIGN, Rb.SIGN, Rc.SIGN, lut, 0x0that detect overflow from the operands' and the sum's sign bits, then two SELs that clamp. That PLOP3 form (opcode 0x21f, registers as sources) wasn't implemented, only the predicate-source forms, so a saturating integer add or subtract failed to translate.APlop3Signreads each source asR < 0and runs the existing PLOP3 lookup table. Mesa NAK has no encoding for this form, so the fields come from the Orin's four encodings: the registers sit where the ALU register form has them, the first LUT is bits 72–79, the second LUT is bits 16–23, and the destinations are bits 81–83 and 84–86. The LUT values check out: 0x02 is a=0, b=0, c=1, which is positive overflow on add. It costs three integer compares and the LUT's terms per destination.Reference entry: "Saturating integer add and subtract (PLOP3 on sign bits)" in
docs/reference/shaders.md.How to verify
iadd_satandisub_satfailed to translate on main and now match the Orin in all 1,024 lanes, so they come out ofKNOWN. Both clamps are exercised: the Orin's outputs hold 56 maximum and 57 minimum clamps foriadd_sat, and 45 and 51 forisub_sat. Only the register form is registered, since no other form has been seen.Checked
test_dmsh_ampere_orin.py; every othertest_dmsh_*gives the same result as on main (test_dmsh_ampere_mem.py,test_dmsh_meshstage.pyandtest_dmsh_pairs.pyfail on main the same way);test_nsp_chain.py,test_xlate_anycpu.py,test_docs.py.lint_python.pyshows no new findings.tool_lock.py --update-lockanddmsh_chain.py --headerwere run (chain 813df7a0ab79).regress.py: not run. My only local Switch 2 build's shader package comes from an older shader split than main's map, so main's chain can't build it. Ocarina of Time's build already translates every shader, so it can't contain this instruction.Docs
docs/reference/shaders.mdhas the entry, andpython3 dm/tools/docs_symptoms.pywas rundmsh_chain.py --headerwas run, anddmsh_chain.h, the translator dlls and the lock are part of the change