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I2I clamps an integer to a narrower type (.SAT) (chain change) - #2054
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…re_orin.py runs about 190 operations, each the GPU compiler's own machine code for one PTX operation, through the translator, spirv-cross, the chain's MSL rewrites and Metal on this Mac's GPU, and compares every output word with what a Jetson Orin (sm_87) computed from the same 1,024 input rows. The translator tests checked the MSL a few encodings give, not the values; this one finds the FSETP.NE, SHFL lane, F2FP, rounding-mode and signed-zero differences the tracking issue lists, which KNOWN names until each fix takes its entry out. dm/gfx/tools/ampere_orin/capture.py records the fixture on any Linux machine with an Ampere GPU and NVIDIA's driver, with no toolkit or compiler on either side
…ules with its functions, so a rewrite that uses one (struct in PR seedds#1902's hfma_msl) runs as it does in a build instead of raising NameError
…: the translator had no emitter for Ampere's I2I (opcode 0x238; the 0x013 registered under that name is IABS), so a shader with a saturating narrowing such as PTX cvt.sat.s8.s32 or cvt.sat.u16.s32 failed to translate. NVIDIA's compiler emits it only as I2I.<type>.S32.SAT with the destination type (U8, S8, U16, S16) in bits 76..77 and every other field zero, so AI2i clamps the source to that type's limits with a signed clamp, which leaves a signed result sign-extended, and fails on any other field rather than guess. test_dmsh_ampere_orin.py: i2i_s8_sat and i2i_u16_sat failed to translate before and now match the Orin in all 1,024 lanes each, so they leave KNOWN; chain e2f3ca1adb6d
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…branch's translator rebuilt from its own source; chain ae1a11760565
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Part of the Ampere accuracy series (#2040). It depends on #2041 for the test: the commits before this PR's own are #2041's and drop out once it lands, so this PR's own change is the last commit.
What and why
cvt.sat.s8.s32and its kin compile toI2I.<type>.S32.SAT(opcode 0x238), which clamps a 32-bit integer to a narrower type's range. The translator had no emitter for it, so a shader with one failed to translate. The existing entry named I2I at 0x013 is really IABS.AI2iclamps to the destination's limits, with the type in bits 76–77 (U8, S8, U16, S16), as every I2I in CuAssembler's sm_75 to sm_86 instruction lists has, and the fixture's two encodings agree. A signed result comes out sign-extended in the 32-bit register, as F2I's narrow results do. No other form appears in those lists, so other bits fail the shader rather than guessing. It costs oneclamp.Reference entry: "I2I clamps an integer to a narrower type" in
docs/reference/shaders.md.How to verify
i2i_s8_satandi2i_u16_satfailed to translate on main and now match the Orin in all 1,024 lanes, so they come out ofKNOWN. One thing the data can't show: both programs sign-extend or mask the result right after the I2I, so what the GPU leaves in the upper bits of a narrow result rests on the F2I convention. U8 and S16 destinations aren't in the fixture.Checked
test_dmsh_ampere_orin.py; every othertest_dmsh_*gives the same result as on main (test_dmsh_ampere_mem.py,test_dmsh_meshstage.pyandtest_dmsh_pairs.pyfail on main the same way);test_nsp_chain.py,test_xlate_anycpu.py,test_docs.py.tool_lock.py --update-lockanddmsh_chain.py --headerwere run (chain e2f3ca1adb6d).regress.py: not run. My only local Switch 2 build's shader package comes from an older shader split than main's map, so main's chain can't build it. Ocarina of Time's build already translates every shader, so it can't contain this instruction.Docs
docs/reference/shaders.mdhas the entry, andpython3 dm/tools/docs_symptoms.pywas rundmsh_chain.py --headerwas run, anddmsh_chain.h, the translator dlls and the lock are part of the change