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IDP integer dot products (dp4a, dp2a) translate (chain change) - #2052
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…re_orin.py runs about 190 operations, each the GPU compiler's own machine code for one PTX operation, through the translator, spirv-cross, the chain's MSL rewrites and Metal on this Mac's GPU, and compares every output word with what a Jetson Orin (sm_87) computed from the same 1,024 input rows. The translator tests checked the MSL a few encodings give, not the values; this one finds the FSETP.NE, SHFL lane, F2FP, rounding-mode and signed-zero differences the tracking issue lists, which KNOWN names until each fix takes its entry out. dm/gfx/tools/ampere_orin/capture.py records the fixture on any Linux machine with an Ampere GPU and NVIDIA's driver, with no toolkit or compiler on either side
…ules with its functions, so a rewrite that uses one (struct in PR seedds#1902's hfma_msl) runs as it does in a build instead of raising NameError
…now translate and give what an Ampere GPU gives: the opcode table had no entry for IDP (0x026 in its low 9 bits), so the translator refused any shader that used one. AIdp adds c to the products of a's parts and b's bytes in 32 bits with wraparound, with sign- or zero-extending field extracts, multiplies and adds; bit 73 makes a's parts signed, bit 74 b's bytes, bit 76 picks .2A (a's 16-bit halves times b's bytes 0 and 1, or 2 and 3 with bit 77, .HI) over .4A. test_dmsh_ampere_orin.py's dp4a_u32, dp4a_s32, dp4a_su, dp2a_lo and dp2a_hi, refused before, now match the Jetson Orin in all 1,024 lanes each and leave KNOWN, and the other translator tests give what they gave before; chain 63e035d65dcd
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…h this branch's translator rebuilt from its own source; chain f0a03e52f4b2
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Part of the Ampere accuracy series (#2040). It depends on #2041 for the test: the commits before this PR's own are #2041's and drop out once it lands, so this PR's own change is the last commit.
What and why
IDP is the integer dot product:
dp4a(four byte products plus c) anddp2a(two 16-bit halves times two bytes plus c). The translator had no entry for it (opcode 0x226 and its other forms), so any shader with one failed to translate.AIdpreads the fields from the Orin's encodings: bit 73 makes a's parts signed, bit 74 makes b's bytes signed, bit 76 selects.2Aand bit 77 selects.2A.HI. They agree with Mesa NAK's IDP4. It sums the products with 32-bit wraparound, as the GPU does, using bitfield extracts, multiplies and adds. Any other modifier bit fails the shader rather than guessing. A.4Acosts 8 extracts, 4 multiplies and 4 adds, and a.2Ahalf that.Reference entry: "IDP integer dot products" in
docs/reference/shaders.md.How to verify
All five (
dp4aunsigned, signed and mixed;dp2a.loand.hi) failed to translate on main and now match the Orin in all 1,024 lanes, so they come out ofKNOWN. Only the register form is in the fixture: the immediate, constant-bank and uniform forms go through the shared operand reader and haven't run against the GPU.Checked
test_dmsh_ampere_orin.py; every othertest_dmsh_*gives the same result as on main (test_dmsh_ampere_mem.py,test_dmsh_meshstage.pyandtest_dmsh_pairs.pyfail on main the same way);test_nsp_chain.py,test_xlate_anycpu.py,test_docs.py.tool_lock.py --update-lockanddmsh_chain.py --headerwere run (chain 63e035d65dcd).regress.py: not run. My only local Switch 2 build's shader package comes from an older shader split than main's map, so main's chain can't build it. Ocarina of Time's build already translates every shader, so it can't contain this instruction.Docs
docs/reference/shaders.mdhas the entry, andpython3 dm/tools/docs_symptoms.pywas rundmsh_chain.py --headerwas run, anddmsh_chain.h, the translator dlls and the lock are part of the change