Implement _mm512_permutex2var_epi64 shim#4963
Implement _mm512_permutex2var_epi64 shim#4963elichai wants to merge 1 commit intorust-lang:masterfrom
_mm512_permutex2var_epi64 shim#4963Conversation
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Thank you for contributing to Miri! A reviewer will take a look at your PR, typically within a week or two. |
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Improved the test code, and I've ran it on a real x86-64 machine(AMD EPYC 9B45) with AVX512: |
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I also have an implementation of |
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Please slow down a little, my review queue is already overloaded. :) |
Hehe yeah I'm sorry, don't worry, I only needed these 3 intrinsics to run my code with miri :) |
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This PR was rebased onto a different master commit. Here's a range-diff highlighting what actually changed. Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers. |
| /// and store the results in `dest`. | ||
| /// | ||
| /// For each lane, the lower `log2(N)` bits select a lane within the chosen input vector, | ||
| /// where `N` is the vector length. The next bit selects between `left` and `right`. |
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And the remaining bits? Are they ignored?
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AFAIU from https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_permutex2var_epi64&expand=4250&ig_expand=5002 it seems like bits [63:4] are ignored
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@rustbot author |
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Reminder, once the PR becomes ready for a review, use |
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This implements the
_mm512_permutex2var_epi64intrinsic, which isvpermi2var.q.512, which permutes 64-bit elements from two input vectors according to an index vector, producing a destination vector.