paste => pastey

riscv-peripheral/CHANGELOG.md

@@ -7,6 +7,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+### Changed
+- replaced `paste` crate with `pastey` to fix RUSTSEC-2024-0436
+
 ## v0.5.0 - 2025-12-19
 
 ### Changed

riscv-peripheral/Cargo.toml

@@ -15,7 +15,7 @@ license = "MIT OR Apache-2.0"
 
 [dependencies]
 embedded-hal = "1.0.0"
-paste = "1.0"
+pastey = "0.2.2"
 riscv = { path = "../riscv", version = "0.16.0" }
 
 [package.metadata.docs.rs]

riscv-peripheral/src/macros.rs

@@ -1,6 +1,6 @@
 //! Utility macros for generating standard peripherals-related code in RISC-V PACs.
 
-pub use paste::paste;
+pub use pastey::paste;
 
 /// Macro to create interfaces to CLINT peripherals in PACs.
 /// The resulting struct will provide safe access to the CLINT registers.

riscv/CHANGELOG.md

@@ -18,6 +18,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 ### Changed
 - Fix the CSR masks to preserve all legal status bits
 - Modify XS and SD bits to read-only summary fields instead of writable fields
+- replaced `paste` crate with `pastey` to fix RUSTSEC-2024-0436
 
 ## v0.16.0 - 2025-12-19
 

riscv/Cargo.toml

@@ -31,4 +31,4 @@ critical-section = "1.2.0"
 embedded-hal = "1.0.0"
 riscv-types = { path = "../riscv-types", version = "0.1.0" }
 riscv-macros = { path = "../riscv-macros", version = "0.4.0", optional = true }
-paste = "1.0.15"
+pastey = "0.2.2"

riscv/src/lib.rs

@@ -48,7 +48,7 @@
 #![allow(clippy::eq_op)]
 #![allow(clippy::identity_op)]
 
-pub use paste::paste;
+pub use pastey::paste;
 
 pub mod asm;
 pub mod bits;