Add opt-in FlashInfer-fast activations for rollout parity - #73
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Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com> Co-authored-by: Yueming Yuan <yym022502@gmail.com>
…VIDIA#5) Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
- Detach output layer params to prevent MTP gradient flowing to output layer - Add mtp_kwargs interface for flexible MTP label/loss_mask passing - Roll mtp_labels and loss_mask for RL training compatibility Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com> Co-authored-by: Yueming Yuan <yym022502@gmail.com>
…yers (NVIDIA#10) - Add is_mtp flag to MoE layers and multi_token_prediction module - Bypass routing replay for MTP layers (MTP uses fresh routing) - Replace rdxa/dev's built-in RouterReplay with miles.utils.routing_replay: - moe_utils.py: use get_routing_replay_compute_topk() wrapper - router.py: use register_routing_replay() for initialization Co-authored-by: Yueming Yuan <yym022502@gmail.com>
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com> Co-authored-by: Yueming Yuan <yym022502@gmail.com>
After bumping Megatron (rdxa/dev), colocated IPC weight update fails with torch.AcceleratorError: CUDA error: invalid argument during torch.multiprocessing serialization of CUDA tensors. Root cause: Megatron's new TMS hook (PR NVIDIA#3048) alters allocator behavior in training flow, causing allocations via cuMemCreate/cuMemMap which are incompatible with CUDA IPC (_share_cuda_() fails). Fix: resolve mapping.py and dynamic_context.py conflicts to isolate hook side effects so TMS/allocator state remains IPC-compatible during the weight update phase. Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
- merge(): truncate dp_reshardable padding on optimizer/param_state path - load_parameter_state_from_dp_reshardable: tolerate missing 'padding' key - ShardedTensor: relax flattened_range to deprecation warning Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
This PR rebases from radixark Megatron fork [miles-20260218](https://github.com/radixark/Megatron-LM/tree/miles-20260218) and resolve conflicts. Upgrade Megatron from Dec 17 (3714d81) to Feb 13 (1dcf0da) PR link: radixark#13 Co-authored-by: Yueming Yuan <yym022502@gmail.com> Made-with: Cursor
…se `--disable-weight-backuper` in miles (NVIDIA#18) Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
Co-authored-by: fzyzcjy <5236035+fzyzcjy@users.noreply.github.com>
…VIDIA#20) Co-authored-by: fzyzcjy <5236035+fzyzcjy@users.noreply.github.com>
Squash merge of the dense true-on-policy Megatron branch. Co-authored-by: zju-stu-lizheng <lizheng.cs@zju.edu.cn> Co-authored-by: zyxiyy02 <282300612+zyxiyy02@users.noreply.github.com> Co-authored-by: Yi Zhang <1109276519@qq.com> Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com> Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Co-authored-by: fzyzcjy <5236035+fzyzcjy@users.noreply.github.com>
…IA#58) Co-authored-by: Zhiyao Jiang <jessicajiang324@gmail.com>
…IA#60) Co-authored-by: zyzshishui <82826991+zyzshishui@users.noreply.github.com> Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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What does this PR do ?
Adds an opt-in Megatron SwiGLU implementation that matches the fast activation arithmetic used by FlashInfer's SM100 CuTe DSL MoE path.
The implementation is disabled by default and enabled at process startup with:
Why
Miles uses Megatron for training and FlashInfer for rollout inference. Megatron's standard
F.silupath and FlashInfer's fastexp2/reciprocal approximation can produce different SwiGLU values, which is undesirable for RL rollout/training consistency.The target arithmetic is the FlashInfer SM100 CuTe sequence:
Source review found that FlashInfer's CuTe, CUTLASS, CUDA, and TRT-LLM paths use the same broad fast-math family, although this PR claims exact arithmetic alignment only with the explicit SM100 CuTe sequence.
Implementation
fast_activations.pymodule that owns the environment policy, fast SwiGLU forward, and analytic training backward.GroupedMLPSwiGLU path through the existing custom autograd wrappers when enabled.The experiment uses the DeepSeek-V3 activation shape
[7168, 4096] -> [7168, 2048]and excludes GEMM, quantization, routing, permutation, unpermutation, and MoE combine.Nemotron-3's ReLU2 path was also audited. It uses only
max(x, 0)followed by self-multiplication, with no approximate transcendental operation. The B200 experiment found exact agreement, so this PR does not add an alternate ReLU2 implementation.Validation
Run on NVIDIA B200 with PyTorch
2.11.0+cu130, CUDA 13.0, and CUTLASS DSL 4.5.2:7 passedwith the environment disabled and7 passedwith it enabled.python3 -m py_compilepassed for the new implementation, test, and experiment files.git diff --checkpassed.sgl-kernelTop-K, MilestorchTop-K, and zero BF16 boundary layers. Independent temperature-1 runs appeared lower with the fast toggle, but they sampled different responses.The full reproduction procedure and result table are in
docs/discussions/flashinfer-fast-activations-alignment.md.Contribution process
flowchart LR A[Pre-checks] --> B[PR Tests] subgraph Code Review/Approval C1[Expert Review] --> C2[Final Review] end B --> C1 C2 --> D[Merge]Pre-checks
Core 0.8)The repository autoformatter and pre-commit were not run for this experiment branch.
Code review
The following process is enforced via the CODEOWNERS file for changes into
megatron/core. For changes outside ofmegatron/core, it is up to the PR author whether or not to tag the Final Reviewer team.For MRs into `main` branch
Feel free to message or comment the @mcore-oncall to help accelerate your merge into main. The less complex your PR is, the faster it will be approved and merged!
(Step 1): Add PR label
Expert Review(Step 2): Collect the expert reviewers reviews
Expert Reviewlabel when your PR is ready for review.Final Review might get declined if these requirements are not fulfilled.
(Step 3): Final Review
Final Reviewlabel(Optional Step 4): Cherry-pick into release branch
If this PR also needs to be merged into
core_r*release branches, after this PR has been merged, selectCherry-pickto open a new PR into the release branch.For MRs into `dev` branch
The proposed review process for `dev` branch is under active discussion.MRs are mergable after one approval by either
eharper@nvidia.comorzijiey@nvidia.com.Merging your PR
Any member of core-adlr and
core-nemowill be able to merge your PR.