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Move to libqemu v11#44

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quic-mathbern wants to merge 3 commits intoqualcomm:mainfrom
quic-mathbern:mathbern/libqemu-11-gh
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Move to libqemu v11#44
quic-mathbern wants to merge 3 commits intoqualcomm:mainfrom
quic-mathbern:mathbern/libqemu-11-gh

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Together with the version bump, we must refactor cpu_hexagon to use
device links for l2vic and qtimer instead of base addresses to match the
associated change implemented at libqemu. Also, cnttid property got
renamed to cnttid_0.

Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
The unconstrained sync policy (need_sync() always returns false) is
incompatible with HVF/KVM where native-speed execution requires
mandatory sync points to coordinate with SystemC. Add it to the
existing skip list alongside multithread and multithread-quantum.

Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
In libqemu-v11 the Hexagon TLB was refactored from an embedded
CPUHexagonState field into a standalone HexagonTLBState device that
must be linked to every CPU via the "tlb" DEFINE_PROP_LINK property.
The cpu_hexagon qbox wrapper never created or linked this device,
leaving cpu->tlb = NULL for all qbox simulations.

Consequences of cpu->tlb = NULL:
- hex_tlbw() is a silent no-op (logs "TLB write attempted but TLB
  not initialized" and returns without touching any state)
- hex_tlb_lookup() unconditionally returns 0x80000000 (miss)

We also remove the num_tlbs and num_dma_tlbs (which control the total
number of TLB entries) from the CPU, as they are now in the TLB object
itself.

Signed-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
@quic-mathbern quic-mathbern force-pushed the mathbern/libqemu-11-gh branch from ef858d9 to c890dd2 Compare April 24, 2026 21:02
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2 participants