feat(vcr-ra): uxth/uxtb mask fold, flag-off (#428, #242)#480
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The selector lowers a 16/8-bit mask (`i32.and x 0xffff`) by materializing the mask into a scratch register and using register-form AND, because 0xffff is not a Thumb-2 modified immediate (`movw rM,#0xffff; and rD,rN,rM`). The new peephole folds that to the dedicated zero-extend `uxth rD,rN` (and the 0xff/uxtb form), dropping the dead movw — −1 instruction, −1 live register per mask. The fourth gale-named hot-path lever after cmp→select / local-promotion / immediate-shift. - New ArmOp `Uxth`/`Uxtb` + Thumb-2 and ARM32 encoders (mirror the existing Sxth/Sxtb; 16-bit form for low regs, .W otherwise). Encoding objdump-verified (`uxth r3,r0` = 0xB283). - `fold_uxth` in liveness.rs: matches `movw #0xffff|#0xff` + AND (commutative — mask in either operand), rewrites to uxth/uxtb, drops the movw. Sound unconditionally (`r & 0xffff` ≡ uxth, rotation 0); removal-only + rewrite-in-place ⇒ offset-neutral. The movw is dead iff the AND writes back to the mask reg (the uxth redefines it) or the mask is otherwise dead-after — same scaffolding as fold_immediate_shifts. 6 unit tests (incl. the and-writes-back-to-mask common case + commutative + decline-on-non-mask-const + decline-when-live). FLAG-OFF by default (opt-in `SYNTH_UXTH_FOLD=1`): off ⇒ bit-identical, frozen byte gate green (control_step 0x00210A55 / flight_algo 0x07FDF307 / div seam preserved). The byte-changing default-on flip is the separate on-target-gated step. Validated: uxth_fold.wat + uxth_fold_differential.py — flag-off (0 folds) == flag-on (2 folds) == wasmtime over 7 vectors, unicorn ARM exec. ORACLE: PASS. Refs #428, #242 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
This was referenced Jun 25, 2026
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The fourth gale-named hot-path lever (after cmp→select / local-promotion / immediate-shift). Flag-off (
SYNTH_UXTH_FOLD=1opt-in) ⇒ bit-identical, frozen gate green; the default-on flip is the separate on-target-gated step.What
i32.and x 0xfffflowers tomovw rM,#0xffff; and rD,rN,rMbecause 0xffff isn't a Thumb-2 modified immediate. The peephole folds that touxth rD,rN(and the 0xff→uxtbform), dropping the dead movw — −1 instruction, −1 live register per mask.How
ArmOp::Uxth/Uxtb+ Thumb-2 and ARM32 encoders (mirrorSxth/Sxtb; 16-bit form for low regs,.Wotherwise). Encoding objdump-verified (uxth r3,r0=0xB283).fold_uxth(liveness.rs): matchesmovw #0xffff|#0xff+ AND (commutative — mask in either operand), rewrites to uxth/uxtb. Sound unconditionally (r & 0xffff≡uxth, rotation 0); removal-only + rewrite-in-place ⇒ offset-neutral. The movw is dead iff the AND writes back to the mask reg (the uxth redefines it — the commonand r3,r0,r3shape) or the mask is otherwise dead-after. 6 unit tests.Verified
0x00210A55, flat+inlined flight_algo0x07FDF307, div seam preserved).uxth_fold_differential.py): flag-off (0 folds) == flag-on (2 folds) == wasmtime over 7 vectors via unicorn ARM execution. ORACLE: PASS.Next in the feature loop: VCR-RA-002 (leaf prologue), #468 (base-CSE), #472 (RISC-V port).
Refs #428, #242
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