feat: cross-architecture comparison profiling#33
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Dispatch logical_error_rate exponent by CodeType: surface/Steane use (d+1)/2, color code (4.8.8) and qLDPC use d/2 per literature refs. Relax code distance validation for qLDPC (even d >= 2 allowed). Add reference hardware models for color code d=9 and qLDPC BB d=12.
New comparison module runs Monte Carlo against multiple hardware models on the same circuit and produces pairwise runtime, qubit count, and space-time product comparisons with relative diffs and winners.
Wire up the Compare CLI subcommand to run_comparison, accepting 2+ hardware model paths and printing per-model summaries with pairwise relative diffs and space-time winners.
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What
Compare a circuit's execution profile across multiple QEC architectures (surface code, color code, qLDPC, Steane) with a single CLI command.
Why
Pirx could only profile one hardware model at a time. Evaluating architecture trade-offs (e.g. surface code d=17 vs qLDPC BB d=12) required separate runs and manual comparison. This adds first-class support for side-by-side profiling with pairwise diffs, making architecture selection data-driven.
How
Three layers, one per crate:
logical_error_rate()now dispatches the suppression exponent byCodeType— surface/Steane use(d+1)/2, color code (4.8.8) and qLDPC used/2per published thresholds. Validation relaxed for qLDPC to accept even distances (e.g. BB [[144,12,12]] has d=12). Two reference TOML models added (color code d=9, qLDPC Gross d=12).comparisonmodule runs Monte Carlo on the same circuit against N hardware models, then produces per-model summaries and pairwise relative diffs (runtime, qubit count, space-time product) with a winner per pair.pirx compare --hw model1.toml --hw model2.toml [--hw ...]subcommand wiring.Testing
make cipasses locally (fmt + clippy + test + audit)Checklist
unwrap()/expect()in production code