A733 add hdmi support

Documentation/devicetree/bindings/clock/allwinner,sun60i-a733-de352-clk.yaml

@@ -0,0 +1,97 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/allwinner,sun60i-a733-de352-clk.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A733 DE352 DETOP Clock Controller
+
+maintainers:
+  - Chen-Yu Tsai <wens@csie.org>
+
+description: |
+  DE352 keeps mixer/display module clocks in the DETOP register block at
+  DE + 0x8000 (RESET/CLK/MBUS), not at the DE2/DE3 clock@0 layout.
+
+properties:
+  "#clock-cells":
+    const: 1
+
+  "#reset-cells":
+    const: 1
+
+  compatible:
+    const: allwinner,sun60i-a733-de352-clk
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: DE AHB fabric gate (CLK_DE_AHB_GATE)
+      - description: DE MBUS fabric gate (CLK_MBUS_DESYS_GATE)
+      - description: DE bus clock (CLK_BUS_DE0)
+      - description: DE module clock (CLK_DE0)
+
+  clock-names:
+    items:
+      - const: ahb
+      - const: mbus
+      - const: bus
+      - const: mod
+
+  resets:
+    items:
+      - description: DE system reset (RST_BUS_DE_SY)
+      - description: DE0 bus reset (RST_BUS_DE0)
+
+  reset-names:
+    items:
+      - const: sys
+      - const: bus
+
+  power-domains:
+    maxItems: 1
+
+required:
+  - "#clock-cells"
+  - "#reset-cells"
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - resets
+  - reset-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/sun60i-a733-ccu.h>
+    #include <dt-bindings/reset/sun60i-a733-ccu.h>
+
+    bus@5000000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0x0 0x0 0x05000000 0x400000>;
+
+        de352_clocks: clock@8000 {
+            compatible = "allwinner,sun60i-a733-de352-clk";
+            reg = <0x8000 0x100>;
+            clocks = <&ccu CLK_DE_AHB_GATE>,
+                     <&ccu CLK_MBUS_DESYS_GATE>,
+                     <&ccu CLK_BUS_DE0>,
+                     <&ccu CLK_DE0>;
+            clock-names = "ahb",
+                          "mbus",
+                          "bus",
+                          "mod";
+            resets = <&ccu RST_BUS_DE_SY>,
+                     <&ccu RST_BUS_DE0>;
+            reset-names = "sys", "bus";
+            #clock-cells = <1>;
+            #reset-cells = <1>;
+        };
+    };
+
+...

Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml

@@ -35,6 +35,7 @@ properties:
       - const: allwinner,sun9i-a80-tcon-tv
       - const: allwinner,sun20i-d1-tcon-lcd
       - const: allwinner,sun20i-d1-tcon-tv
+      - const: allwinner,sun60i-a733-tcon-tv
 
       - items:
           - enum:
@@ -254,6 +255,7 @@ allOf:
               - allwinner,sun8i-r40-tcon-tv
               - allwinner,sun9i-a80-tcon-tv
               - allwinner,sun20i-d1-tcon-tv
+              - allwinner,sun60i-a733-tcon-tv
 
     then:
       properties:

Documentation/devicetree/bindings/display/allwinner,sun60i-a733-de352-mixer.yaml

@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/allwinner,sun60i-a733-de352-mixer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A733 DE352 Mixer
+
+maintainers:
+  - Chen-Yu Tsai <wens@csie.org>
+
+description: |
+  DE352 mixer / display pipe for A733. DT shape follows the T527 A523
+  de33-mixer-0 node (engine/top/display/detop), but the driver is sun60i_de
+  (DE352 RCQ), not sun8i_mixer.
+
+properties:
+  compatible:
+    const: allwinner,sun60i-a733-de352-mixer-0
+
+  reg:
+    items:
+      - description: Channel / overlay engine (DE + 0x100000)
+      - description: RTMX top (DE + 0x8100)
+      - description: Display blender / formatter (DE + 0x280000)
+      - description: DETOP mux block (DE + 0x8000); overlaps de352-clk
+
+  reg-names:
+    items:
+      - const: engine
+      - const: top
+      - const: display
+      - const: detop
+
+  clocks:
+    minItems: 2
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: bus
+      - const: mod
+
+  resets:
+    maxItems: 1
+
+  reset-names:
+    items:
+      - const: mod
+
+  iommus:
+    maxItems: 1
+
+  power-domains:
+    maxItems: 1
+
+  chn_cfg_mode:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: DE352 channel topology selected for this mixer.
+
+  allwinner,tcon-id:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    maximum: 15
+    description: |
+      Hardware TCON device index programmed into the DE2TCON mux for display
+      pipe 0. This is a hardware device index, not an OF graph endpoint ID.
+      A733 TCON-LCD0/1/2 use 0/1/2 respectively.
+
+  ports:
+    $ref: /schemas/graph.yaml#/properties/ports
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - clocks
+  - clock-names
+  - resets
+  - reset-names
+
+additionalProperties: true
+
+...

Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml

@@ -43,6 +43,7 @@ properties:
       - allwinner,sun8i-r40-tcon-top
       - allwinner,sun20i-d1-tcon-top
       - allwinner,sun50i-h6-tcon-top
+      - allwinner,sun60i-a733-tcon-top
 
   reg:
     maxItems: 1
@@ -60,6 +61,14 @@ properties:
     maxItems: 3
 
   resets:
+    minItems: 1
+    maxItems: 2
+
+  reset-names:
+    minItems: 1
+    maxItems: 2
+
+  power-domains:
     maxItems: 1
 
   ports:
@@ -99,16 +108,12 @@ properties:
     required:
       - port@0
       - port@1
-      - port@4
-      - port@5
 
 required:
-  - "#clock-cells"
   - compatible
   - reg
   - clocks
   - clock-names
-  - clock-output-names
   - resets
   - ports
 
@@ -152,6 +157,27 @@ allOf:
             - port@2
             - port@3
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - allwinner,sun8i-r40-tcon-top
+              - allwinner,sun20i-d1-tcon-top
+              - allwinner,sun50i-h6-tcon-top
+              - allwinner,sun60i-a733-tcon-top
+
+    then:
+      required:
+        - "#clock-cells"
+        - clock-output-names
+
+      properties:
+        ports:
+          required:
+            - port@4
+            - port@5
+
   - if:
       properties:
         compatible:

Documentation/gpu/index.rst

@@ -20,6 +20,7 @@ GPU Driver Developer's Guide
    vgaarbiter
    automated_testing
    implementation_guidelines
+   sun60i-a733-display
    todo
    rfc/index
 

Documentation/gpu/sun60i-a733-display.rst

@@ -0,0 +1,22 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+.. Copyright(c) 2020 - 2023 Allwinner Technology Co.,Ltd. All rights reserved.
+
+=============================
+Allwinner A733 display output
+=============================
+
+The A733 DE352 mixer routes its output to TCON-TV and the DesignWare HDMI
+controller through the Video Output 1 timing-controller top block. The
+driver exposes one primary plane and an ARGB8888 cursor, with one mixer
+output active at a time.
+
+HDMI board setup
+================
+
+Include ``sun60i-a733-display.dtsi`` and enable ``de_drm``, ``mixer0``,
+``tcon_top``, ``tcon_tv`` and ``hdmi`` in the board description. The DRM
+master uses the reserved display CMA pool for DMA allocations. HDMI audio
+is connected to I2S3 through the board's simple-audio-card description.
+
+Panel paths are separate from the HDMI pipeline and require their own
+controller, PHY and board-specific panel descriptions.

arch/arm64/boot/dts/allwinner/sun60i-a733-demo-aiot.dts

@@ -1,4 +1,5 @@
 #include "sun60i-a733.dtsi"
+#include "sun60i-a733-display.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/usb/pd.h>
@@ -81,6 +82,23 @@
 		};
 	};
 
+	hdmi_sound: sound-hdmi {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "HDMI";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,mclk-fs = <128>;
+
+		simple-audio-card,cpu {
+			sound-dai = <&i2s3>;
+			dai-tdm-slot-num = <2>;
+			dai-tdm-slot-width = <32>;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&hdmi>;
+		};
+	};
+
 	/*
 	 * AMP / remoteproc / rpmsg shared memory (layout aligned with Tina
 	 * sun60iw2 / a537 demo_aiot). Keep these regions below DRAM end.
@@ -487,6 +505,13 @@
 		id = <5>;
 		skip;
 	};
+
+	/* DE0 is IOMMU master 8 and shares the DE_SYS power domain. */
+	de0_iommu {
+		iommu-master;
+		id = <8>;
+		power-domains = <&pck600 PD_DE_SYS>;
+	};
 };
 
 &usbphy {
@@ -553,3 +578,29 @@
 &gpu {
 	status = "okay";
 };
+
+/* I2S3 is internally routed to the DesignWare HDMI audio interface. */
+&i2s3 {
+	status = "okay";
+};
+
+/* Enable the A733 DE352 to HDMI display pipeline. */
+&de_drm {
+	status = "okay";
+};
+
+&mixer0 {
+	status = "okay";
+};
+
+&tcon_top {
+	status = "okay";
+};
+
+&tcon_tv {
+	status = "okay";
+};
+
+&hdmi {
+	status = "okay";
+};