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docs(adr): ADR-079 adaptive micro-LoRA brain (composed train-govern-compose-route-consume loop)#732

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Jul 9, 2026
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docs(adr): ADR-079 adaptive micro-LoRA brain (composed train-govern-compose-route-consume loop)#732
oceanwaves630 merged 2 commits into
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docs/adr-079-micro-lora-brain

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@oceanwaves630 oceanwaves630 commented Jul 9, 2026

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Summary

ADR-079 is the synthesizing record for the composed multi-adapter LoRA system built one stage at a time across six independently-merged PRs. No prior document maps the loop as one system: seven existing LoRA ADRs each cover a single-adapter lifecycle slice or an orthogonal composition axis, and ADR-056's own appendix admits its designed training pipeline was never built.

The ADR names shipped / partial / gap per stage of the TRAIN → GOVERN → COMPOSE → ROUTE → CONSUME loop, every load-bearing row anchored to a merge commit + origin/main file:line.

Composing PRs

Two record corrections

  1. The merged CPU backward trainer is feat(tune): exact-gradient LoRA backward + multi-layer training pipeline #191 (7b46f6e77), not commit f34ed3b1. The "surface-B" GDN LoRA weight-grad commits are not ancestors of origin/main: f34ed3b1 was in the now-closed PR feat: LoRA backward training (GQA+GDN) + LatticeStudio macOS instrument app #193, and the current standalone PR feat(tune): surface-B GDN LoRA weight gradients + train_grad_full fields #202 (different head commits) is still OPEN — neither is on head. So today only GQA q_proj/v_proj adapters train; GDN LoRA weight-gradients do not exist in mergeable code.
  2. feat(inference): add query-likelihood reranking to the Qwen3.5 decoder #718 is unrelated to Stable rerank API on lattice-inference with LoraHook injection #59. feat(inference): add query-likelihood reranking to the Qwen3.5 decoder #718 is the causal-LM reranker; Stable rerank API on lattice-inference with LoraHook injection #59 (cross-encoder LoraHook injection) was addressed by PR feat: implement ADR-057 LoRA full-lifecycle consumer API (D1-D5) #65 five weeks earlier. Two independent rerank-via-seam consumers now exist; the ADR names them as siblings.

Named gaps (each with a re-entry trigger)

G1 GDN LoRA weight-grads (#202), G2 in-process route→refit→route loop-closure, G3 EWC anchor-pullback as a live anti-forgetting mode, G4 rerank-consumer disambiguation.

Scope / review

  • Docs-only. No code, no bench, no parity impact.
  • Every reality row is source-read or PR/issue-state against origin/main @ b0604722d; the file:line anchors and the two corrections are the load-bearing claims to audit.
  • INDEX note: this PR adds the ADR-079 row. ADR-071..078 are absent from INDEX.md (pre-existing — the bundle-sequencing ADRs were never registered); left for a separate housekeeping pass rather than scope-creeping this docs PR.

…ompose-route-consume loop)

Synthesizing record for the composed multi-adapter LoRA loop built across #191/#443/#444/#448/#453/#718: names shipped/partial/gap per stage with origin/main file:line anchors, references prior LoRA ADRs (008/031/043/045/054/056/057) without re-litigating them.

Two record corrections: (1) the merged CPU backward trainer is #191 (7b46f6e), not commit f34ed3b (abandoned branch; its PR #202 is OPEN) - only GQA q/v adapters train on head, GDN LoRA weight-grads are not on main; (2) #718 is the causal-LM query-likelihood reranker and does NOT close #59 (that was #65, the cross-encoder path).

INDEX: adds the ADR-079 row; ADR-071..078 remain absent from INDEX (pre-existing gap, flagged for separate housekeeping).
…split, #65 merge SHA)

Address the APPROVE-WITH-FIXES audit: (1) manifest loader has eleven ordered checks not ten; (2) separate the closed/unmerged #193 lineage that held f34ed3b from the open standalone #202 (different head commits) - both still non-ancestors of origin/main; (3) cite #65 merge commit 8ac486d, label 894dfdc as the D1 hook commit within it. Load-bearing facts unchanged.
@oceanwaves630 oceanwaves630 marked this pull request as ready for review July 9, 2026 12:54
@oceanwaves630 oceanwaves630 enabled auto-merge (squash) July 9, 2026 12:54

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SPEC GATE SIGNED: ADR-079. Composed-loop map with file:line pins at b060472, two load-bearing record corrections (GDN grads not on main — PR #202 open; #718 does not close #59 — that was #65), four named gaps each with re-entry triggers, S-row rider. Canonical map for Lane 1; supersedes nothing.

@oceanwaves630 oceanwaves630 merged commit 0699e60 into main Jul 9, 2026
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@oceanwaves630 oceanwaves630 deleted the docs/adr-079-micro-lora-brain branch July 9, 2026 13:14
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