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Restoring into fresh KVM vCPUs drops IA32_SPEC_CTRL (0x48), so a guest's enabled IBRS, STIBP or SSBD controls can remain disabled until the guest next writes the MSR. An eIBRS guest that initializes IBRS at boot is particularly dependent on preserving this state.
In vmm_core/virt/src/x86/vp.rs, the state_trait! declaration defines the VP state elements carried through save and restore:
(8,"pat", pat, set_pat,Pat),(9,"msrs", virtual_msrs, set_virtual_msrs,VirtualMsrs),(10,"drs", debug_regs, set_debug_regs,DebugRegisters),(11,"tsc", tsc, set_tsc,Tsc),(12,"cet", cet, set_cet,Cet),(13,"cet_ss", cet_ss, set_cet_ss,CetSs),(14,"tsc_aux", tsc_aux, set_tsc_aux,TscAux),// The deadline must be restored after APIC mode and guest TSC.(15,"tsc_deadline", tsc_deadline, set_tsc_deadline,TscDeadline),
There is no SPEC_CTRL element, and VirtualMsrs contains syscall-related MSRs rather than speculation controls. The KVM accessors consequently never restore the captured SPEC_CTRL value.
Trigger
Use KVM with a supported Skylake-SP or Alder Lake guest profile and a guest that enables a SPEC_CTRL control. Capture after the write and restore into fresh vCPUs; inspect the MSR before guest execution rewrites it. Both profiles expose CPUID.(7,0):EDX[26,27,31], and Alder Lake pins IBRS_ALL. Ice Lake-SP, Emerald Rapids and the current AMD built-ins hide these controls; host-derived profiles depend on their effective CPUID.
Proposed Fix
Add optional SPEC_CTRL state gated by guest exposure and backend MSR support, restoring it before the guest runs. Decide how the preservation guarantee interacts with compatibility: older snapshots lack the value, and older readers can ignore a new field. A reader-version restriction may be needed to prevent silent mitigation loss across mixed-version restore.
Activity