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Pull requests: llvm/circt
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[MooreToCore][Sim] Implementation of queues in Sim
#9651
opened Feb 11, 2026 by
Lauriethefish
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[FIRRTL] Refactor LowerTypes to use linear-time port removal, NFC
#9647
opened Feb 11, 2026 by
uenoku
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[Transforms] FlattenMemRefs: handle resource-backed globals
#9625
opened Feb 6, 2026 by
RCoeurjoly
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fix: handle global memrefs in flatten-memref pass
#9615
opened Feb 5, 2026 by
Abhilekhgautam
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[Comb] Fix assertion failure in extractConcatToConcatExtract pattern (Fixes #9573)
#9598
opened Feb 3, 2026 by
m2kar
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[Arc] Complete inout support for arcilator path (Fixes #9574)
#9597
opened Feb 3, 2026 by
m2kar
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[circt-verilog] add error message for multiple driver targetting same bits
#9590
opened Feb 2, 2026 by
5iri
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[LLHD] teach Deseq about projected fields via ValueField keys
#9588
opened Feb 2, 2026 by
5iri
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[HandshakeToHW] Fix crashes when multiple
syncs with different numbers of none inputs are used
#9587
opened Feb 2, 2026 by
zhengyao-lin
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[firtool] Only run verifiers at required points in the pipeline
FIRRTL
Involving the `firrtl` dialect
#9559
opened Jan 30, 2026 by
youngar
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[Arc] Add Support for Dynamic Strings to the Arcilator Runtime
Arc
Involving the `arc` dialect
#9546
opened Jan 29, 2026 by
KavyaChopra04
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[SCFToCalyx] Fix crash when calling external functions (Fix #9529)
#9530
opened Jan 28, 2026 by
m2kar
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[FIRRTL] Add InstanceGraphInstanceOpInterface to InstanceChoiceOp
#9523
opened Jan 27, 2026 by
uenoku
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Fix bit-select sensitivity lists leaking LLHD ops (Fixes #9469)
#9481
opened Jan 20, 2026 by
5iri
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[FIRRTL] Add DomainKind attribute to WireOp for domain-typed Wires
#9453
opened Jan 14, 2026 by
MrRoy09
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