Supported Targets	ESP32	ESP32-S2	ESP32-S3

ULP Pulse Counting Project

This project demonstrates ultra-low-power pulse counting using the ULP FSM coprocessor on ESP32-family chips. It counts pulses on a GPIO while the main CPU is running or in deep sleep, and saves results to NVS.

Features

• ULP FSM pulse counting with debouncing
• Deep sleep and wakeup on pulse threshold
• NVS storage of pulse count
• Battery voltage monitoring
• Fast bootloader wakeup
• GPIO event simulation

Hardware Requirements

• ESP32, ESP32-S2, or ESP32-S3 development board
• Input signal connected to GPIO0 (default; configurable)
• Button or pulse generator for GPIO0

Source Overview

• main/pulse_cnt_main.c: Main application logic
• main/battery.c: Battery monitoring
• main/ulp/: ULP assembly source files
• pytest_ulp_fsm.py: Automated hardware tests

Configuration

Project configuration is managed using ESP-IDF's menuconfig utility. You can set options such as ULP wakeup period, GPIO pin selection, battery thresholds, bootloader behavior, and network settings.

Wi-Fi SSID/password and MQTT broker details must also be configured via menuconfig under the relevant networking and MQTT sections. This ensures your device can connect to your network and publish pulse data.

To configure:

1. Run:

   idf.py menuconfig
   

2. Navigate through the menu to adjust:
   • ULP wakeup period
   • GPIO pin for pulse input
   • Battery voltage threshold
   • Bootloader options (e.g., skip validation in deep sleep)
3. Save and exit. Your settings will be stored in sdkconfig.

You can also edit sdkconfig.defaults for default values.

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Build & Flash

1. Install ESP-IDF and set up your environment
2. Build the project:

   idf.py build
   

3. Flash to your device:

   idf.py -p <PORT> flash
   

Running the Project

1. Connect your board to your computer
2. Open serial monitor:

   idf.py -p <PORT> monitor
   

3. Press the button on GPIO0 to generate pulses
4. Observe pulse counting, deep sleep, and wakeup events in the serial output

Example Output

Not ULP wakeup, initializing ULP
Entering deep sleep

ULP wakeup, saving pulse count
Read pulse count from NVS:   384
Pulse count from ULP:     5
Wrote updated pulse count to NVS:   389
Entering deep sleep
... (repeats)

Testing

Automated hardware tests are provided in pytest_ulp_fsm.py using the pytest-embedded framework.

To run tests:

1. Install dependencies:

   pip install pytest pytest-embedded pytest-embedded-idf
   

2. Connect your device and ensure firmware is flashed
3. Run:

   pytest pytest_ulp_fsm.py
   

Power Consumption

With default configuration (20ms ULP wakeup period), average current in deep sleep on ESP32 is ~16uA.