feat(hal): enable riscv64 Sv39 MMU with an identity page table - #146
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The riscv64 boot ran with paging off (satp = 0). Build a minimal Sv39 identity map and turn it on, mirroring the aarch64 #142 approach. Sv39's root (L2) table maps 1 GiB gigapages; _start populates a BSS-resident, 4 KiB-aligned root table (__riscv_root_pt) with two identity leaf PTEs (flags V|R|W|X|A|D = 0xCF): L2[0] -> 0x0000_0000..0x4000_0000 device MMIO (CLINT 0x0200_0000, PLIC 0x0C00_0000, NS16550 0x1000_0000) L2[2] -> 0x8000_0000..0xC000_0000 RAM (OpenSBI + kernel at 0x8020_0000) then sets satp = MODE_SV39 | (root >> 12) with sfence.vma before/after. Verified: 'qemu-system-riscv64 -M virt -bios default' boots with paging ON all the way to the halt loop (UART/PLIC/timer all reached through the identity map), with zero S-mode page faults under 'qemu -d int' (the remaining illegal-insn traps are pre-existing OpenSBI-firmware HPM probing, unrelated). x86_64/aarch64 unaffected.
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The riscv64 boot ran with paging off (
satp=0). Build a minimal Sv39 identity map and enable it (mirrors aarch64 #142).Sv39 root (L2) table maps 1 GiB gigapages;
_startpopulates a BSS-resident 4 KiB-aligned__riscv_root_ptwith two identity leaf PTEs (flags V|R|W|X|A|D = 0xCF):then
satp = MODE_SV39 | (root >> 12)withsfence.vmabefore/after.Verified (
qemu-system-riscv64 -M virt -bios default): boots with paging ON to the halt loop (UART/PLIC/timer all reached through the identity map), zero S-mode page faults underqemu -d int(remaining illegal-insn traps are pre-existing OpenSBI HPM probing, unrelated). x86_64/aarch64 unaffected.