[hardware, fsdp, vllm] feat: add Intel GPU (XPU) support

[kahlun]

What does this PR do?

Adds Intel GPU (PyTorch XPU) as a hardware backend for verl, enabling end-to-end GRPO, PPO, and SFT training with FSDP/FSDP2 actors and vLLM colocated rollout. Intel GPU is integrated through the existing platform-abstraction layer (the same path used by CUDA / Ascend NPU), so no algorithm or trainer code is forked — device dispatch is resolved generically via the platform registry and get_device_name().

Validated end-to-end on Intel Arc Pro B-series (Battlemage) hardware, single-GPU through multi-GPU.

Checklist Before Starting

• Search for similar PRs. No existing PR adds Intel GPU / torch.xpu support.
• Format the PR title as [{modules}] {type}: {description}: [hardware, fsdp, vllm] feat: add Intel GPU (XPU) support.

Test

CI cannot cover this change: Intel GPU hardware is not available in GitHub Actions. Validated manually with Qwen2.5-0.5B-Instruct on GSM8K. Repro scripts are added under tests/special_intel_gpu/.

Workload	Topology	Result
GRPO	1 GPU	✅ pass (step metrics; rollout↔actor pearson ≈ 0.999)
GRPO	2 GPU	✅ pass
GRPO	4 GPU	✅ pass
PPO	2 GPU (pass NUM_GPUS=2; script default is 4)	✅ pass
SFT	2 GPU (pass NUM_GPUS=2; script default is 4)	✅ pass

Commands:

NUM_GPUS=2 bash tests/special_intel_gpu/run_grpo_intel_gpu.sh
NUM_GPUS=2 bash tests/special_intel_gpu/run_ppo_intel_gpu.sh
NUM_GPUS=2 bash tests/special_intel_gpu/run_sft_intel_gpu.sh
bash tests/special_intel_gpu/run_grpo_colocate_rm_intel_gpu.sh
bash tests/special_intel_gpu/run_standalone_gen_intel_gpu.sh

API and Usage Example

No public API or CLI changes. Intel GPU is selected automatically when torch.xpu is available; existing recipes run unmodified with trainer.device=xpu.

# Build the image (Intel Deep Learning Essentials 2026.1.0 base, torch 2.13.0+xpu,
# vLLM v0.27.0, compute-runtime 26.18, triton-xpu 3.7.1)
docker build -f docker/intel_gpu/Dockerfile.intel_gpu -t verl-intel-gpu .

# Launch the container
RENDER_GID=$(getent group render | cut -d: -f3)
VIDEO_GID=$(getent group video | cut -d: -f3)

docker run -it --rm \
  --device /dev/dri \
  --group-add ${RENDER_GID} \
  --group-add ${VIDEO_GID} \
  -v /dev/dri/by-path:/dev/dri/by-path \
  --ipc=host \
  --shm-size 16g \
  -v $HOME/data:/root/data \
  -v $HOME/.cache:/root/.cache \
  -w /workspace/verl \
  verl-intel-gpu:latest \
  /bin/bash

# Run a colocated 2-GPU GRPO job (inside the container)
NUM_GPUS=2 bash tests/special_intel_gpu/run_grpo_intel_gpu.sh

Design & Code Changes

Intel GPU plugs into the platform abstraction rather than adding device branches across the codebase.

Platform backend (new)

• verl/plugin/platform/platform_xpu.py — PlatformXPU: torch.xpu device management, xccl (oneCCL) collective backend via communication_backend_name(), ZE_AFFINITY_MASK device masking, Ray "GPU" resource mapping, and IPC disabled (falls back to shared memory pending SYCL IPC-handle support).
• verl/plugin/platform/platform_manager.py — register the intel platform.

ReduceOp.AVG workaround

• verl/workers/engine_workers.py and verl/trainer/sft_trainer.py — ReduceOp.AVG is not supported by oneCCL on the OFI scheduler path; replaced with explicit ReduceOp.SUM followed by manual division for XPU devices. Tracked; expected to be resolved in an end-of-year PyTorch release.

Engine registration

• verl/workers/engine/fsdp/transformer_impl.py — add "xpu" to the device= list for both FSDPEngineWithLMHead and FSDPEngineWithValueHead registry decorators.

Device-agnostic dispatch

• verl/utils/attention_utils.py — XPU is routed through the existing NPU flash-attention shim (pure-PyTorch impl) via get_platform().device_name == "xpu", removing the prior cuda/npu-only branch.
• verl/utils/torch_functional.py — log_probs_from_logits_response_rmpad and log_probs_from_logits_all_rmpad now import padding helpers from verl.utils.attention_utils unconditionally, replacing the hardcoded per-device import chain.
• tests/models/test_transformer.py, tests/models/test_transformers_ulysses.py — same fix: import from verl.utils.attention_utils unconditionally instead of branching on cuda/npu.
• tests/special_standalone/test_memory_buffers.py — replaced hardcoded torch.cuda / .cuda() calls with get_device_name() / get_torch_device() so the test runs on any device.

Test coverage

• tests/plugin/test_platform_abstraction.py — extend auto-detection assertion to include "intel".

Infra, docs, tests (new)

• docker/intel_gpu/Dockerfile.intel_gpu + README.md, requirements-intel-gpu.txt.
• docs/intel_gpu_tutorial/intel_gpu_quick_start.rst, intel_gpu_build_dockerfile_page.rst + docs/index.rst.
• tests/special_intel_gpu/run_grpo_intel_gpu.sh, run_ppo_intel_gpu.sh, run_sft_intel_gpu.sh, run_grpo_colocate_rm_intel_gpu.sh, run_standalone_gen_intel_gpu.sh.

Scope / limitations

• Rollout is validated in colocated mode (train + generate share GPUs). Disaggregated / non-colocated rollout is out of scope for this PR and work in progress to provide it.
• XPU IPC falls back to shared memory pending SYCL IPC-handle support, expected to be released by end of 2026.

Checklist Before Submitting

• Read the Contribute Guide.
• Apply pre-commit checks: pre-commit install && pre-commit run --all-files --show-diff-on-failure --color=always.
• Add / Update the documentation (docs/intel_gpu_tutorial/).
• Add unit or end-to-end test(s) to the CI workflow to cover all the code. Not feasible: Intel GPU hardware is not available in GitHub Actions; manual validation scripts are provided under tests/special_intel_gpu/.

AI assistance disclosure: this change was developed with AI assistance (Claude). Every changed line was reviewed by the submitter and validated end-to-end on real Intel Arc Pro B-series hardware; commits are co-authored accordingly.