Fuse aarch64 register moves#2723
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saagarjha
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Nice work! I measured a consistent 2-5% win across various workloads which seems in line with what you were seeing. A couple of comments though, and also if you could make an x86-64 path for this optimization too that would be much appreciated.
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| static inline enum arg gen_resolve_arg(enum arg arg, struct modrm *modrm, uint64_t *imm, dword_t addr_offset) { |
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This is basically the same code as what is right above it, can we avoid duplicating it? We aren't even using its full functionality; I think we should probably just fastpath the things we care about
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| .macro mov32_reg_reg_row dst_name, dst | ||
| mov32_reg_reg \dst_name, \dst, reg_a, eax | ||
| mov32_reg_reg \dst_name, \dst, reg_c, ecx | ||
| mov32_reg_reg \dst_name, \dst, reg_d, edx | ||
| mov32_reg_reg \dst_name, \dst, reg_b, ebx | ||
| mov32_reg_reg \dst_name, \dst, reg_sp, esp | ||
| mov32_reg_reg \dst_name, \dst, reg_bp, ebp | ||
| mov32_reg_reg \dst_name, \dst, reg_si, esi | ||
| mov32_reg_reg \dst_name, \dst, reg_di, edi | ||
| .endm | ||
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| mov32_reg_reg_row reg_a, eax | ||
| mov32_reg_reg_row reg_c, ecx | ||
| mov32_reg_reg_row reg_d, edx | ||
| mov32_reg_reg_row reg_b, ebx | ||
| mov32_reg_reg_row reg_sp, esp | ||
| mov32_reg_reg_row reg_bp, ebp | ||
| mov32_reg_reg_row reg_si, esi | ||
| mov32_reg_reg_row reg_di, edi |
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I think we have an each_reg macro for this or something like that
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May 3, 2026
Add a narrower variant of the register-to-register MOV fast path discussed in upstream ish-app#2723. This keeps argument handling on the existing gen_op path for the general case, fast-paths only 32-bit register moves, and emits direct host gadgets for both aarch64 and x86_64.
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Summary
Fuse 32-bit register-to-register
movon aarch64 into one direct gadget instead of emitting separate load and store gadgets.Changes:
mov32_reg_reggadgets for the general register matrix.Results
Measured with the benchmark/profiling branch now kept separately at
siraben/ish:bench/hot-system-paths-bench-profile. Release build, 7 runs each:Instrumentation also showed translated block code words dropping for representative workloads:
144074 -> 142484896963 -> 886056Validation
ninja -C build