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[water] Add ordered_syms attribute to preserve dimension ordering#714

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tyb0807 merged 2 commits intoiree-org:mainfrom
tyb0807:ordered_syms_attr
Jan 20, 2026
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[water] Add ordered_syms attribute to preserve dimension ordering#714
tyb0807 merged 2 commits intoiree-org:mainfrom
tyb0807:ordered_syms_attr

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@tyb0807 tyb0807 commented Jan 13, 2026

MLIR's DictionaryAttr sorts entries alphabetically by key, which loses the semantic dimension ordering. This caused incorrect code generation with transposed memory indices.

This change adds an ordered_syms attribute to ReadOp and WriteOp that captures the dimension ordering from WaveTensorType before it is converted to MemRefType. The ResolveDistributedAllocations pass now sets this attribute, and a new OrderedSymsSpecified normal form bit ensures this happens before LowerWaveToMLIR.

For ops with WaveTensorType memory operands, the ordering is extracted from the type's shape. For MemRefType memory operands (after allocation resolution), the ordered_syms attribute is used.

@tyb0807 tyb0807 requested review from ftynse and tgymnich January 13, 2026 08:22
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tyb0807 commented Jan 13, 2026

After offline discussion, I'll try to take a shot at introducing a proper attribute for index expressions that lets us keep stable ordering across dimensions, required when lowering index expressions to affine maps, used primarily by memory operations.

In the meantime, this can still be used to unblock end-to-end execution of matmul and FA kernels.

@tyb0807 tyb0807 force-pushed the ordered_syms_attr branch 7 times, most recently from 1c559d5 to fd2c2aa Compare January 16, 2026 13:11
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tyb0807 commented Jan 16, 2026

Still pushing on this because it might take some time for #730 to land (if that's actually the right solution to this)

@tyb0807 tyb0807 requested a review from ftynse January 16, 2026 14:13
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With your addressing of previous reviews, this looks good to me.
Please fix the conflict, and we are good to merge.

MLIR's DictionaryAttr sorts entries alphabetically by key, which loses
the semantic dimension ordering from the Python frontend when index
expressions are stored. This caused incorrect code generation with
transposed memory indices.

This change adds an ordered_syms attribute to ReadOp and WriteOp that
captures the dimension ordering from WaveTensorType before it is
converted to MemRefType. The ResolveDistributedAllocations pass now
sets this attribute, and a new OrderedSymsSpecified normal form bit
ensures this happens before LowerWaveToMLIR.

For ops with WaveTensorType memory operands, the ordering is still
extracted from the type's shape. For MemRefType memory operands
(after allocation resolution), the ordered_syms attribute is used.

Signed-off-by: tyb0807 <sontuan.vu@amd.com>
@tyb0807 tyb0807 force-pushed the ordered_syms_attr branch 2 times, most recently from a3ddcd8 to 949fda8 Compare January 20, 2026 12:27
Signed-off-by: tyb0807 <sontuan.vu@amd.com>
@tyb0807 tyb0807 merged commit 41d3db5 into iree-org:main Jan 20, 2026
21 of 22 checks passed
@tyb0807 tyb0807 deleted the ordered_syms_attr branch January 20, 2026 14:47
tyb0807 added a commit to tyb0807/wave that referenced this pull request Jan 26, 2026
…ee-org#714)

MLIR's DictionaryAttr sorts entries alphabetically by key, which loses
the semantic dimension ordering. This caused incorrect code generation
with transposed memory indices.

This change adds an ordered_syms attribute to ReadOp and WriteOp that
captures the dimension ordering from WaveTensorType before it is
converted to MemRefType. The ResolveDistributedAllocations pass now sets
this attribute, and a new OrderedSymsSpecified normal form bit ensures
this happens before LowerWaveToMLIR.

For ops with WaveTensorType memory operands, the ordering is extracted
from the type's shape. For MemRefType memory operands (after allocation
resolution), the ordered_syms attribute is used.

---------

Signed-off-by: tyb0807 <sontuan.vu@amd.com>
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3 participants