Preparing to release v0.6.9

CHANGELOG.md

@@ -1,3 +1,8 @@
+## 0.6.9
+
+- Fixed a bug where unnamed or mergeable inOut loop-back connections on a single module could be incorrectly omitted from the generated SystemVerilog (<https://github.com/intel/rohd/pull/655>).
+- Improved generated SystemVerilog to avoid duplicate constant declarations and preserve more naming context for `LogicStructure` elements (<https://github.com/intel/rohd/pull/650>).
+
 ## 0.6.8
 
 - Fixed a bug where constant assignments or tie-offs could be lost in certain rare scenarios in generated outputs (<https://github.com/intel/rohd/pull/643>).

lib/src/utilities/config.dart

@@ -10,5 +10,5 @@
 /// A utility for ROHD configuration file.
 class Config {
   /// The version of the ROHD framework.
-  static const String version = '0.6.8';
+  static const String version = '0.6.9';
 }

pubspec.yaml

@@ -1,5 +1,5 @@
 name: rohd
-version: 0.6.8
+version: 0.6.9
 description: The Rapid Open Hardware Development (ROHD) framework, a framework for describing and verifying hardware.
 homepage: https://intel.github.io/rohd-website
 repository: https://github.com/intel/rohd