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FI from upstream - #6
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add Waveshare ESP32-S3-Tiny-N8R8 board
Add LilyGO T-Beam 1W
update senseBox MCU Eye name and flashsize
…8di-8ro Add Waveshare ESP32-S3-ETH-8DI-8RO board support
The existing espressif_esp32s3_devkitc_1 board is configured for 8MB flash, so on a 32MB board it leaves most of the flash unused. Adds a 32MB partition table and a board variant that uses it. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
espressif: add ESP32-S3-DevKitC-1-N32R16 board
Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Current board startup muxes A0 to TRACE_CLK. Restore GPIO input mode for every analog read so peripheral outputs cannot drive the voltage divider. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Run one GPIO/power test per command, release analog inputs before conversion, accept measured 8–13 V DC input, and flush failure messages. Hold the ESP32 in reset only during the fixture pass and release tested outputs before restart. Enable CDC DTR/RTS programming resets, preserve USB TX backpressure, service both bridge directions between bounded writes, and respect UART read lengths. Reuse the flash-only application linker correction from PR #484. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Improve Metro M7 factory test and SD SPI handling
Release the UART loopback partner pins from trace output before starting the ESP32 bridge. Skip the SPI loopback because the Brains fixture leaves its SPI pogos covered; retain SPI pins in short detection. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Run a bounded NINA SPI scan after the GPIO and power checks, accepting the factory pass only when at least one valid nonempty SSID is returned. Escape SSID output and keep USB responsive while waiting. Add a friendly serial greeting, LED/NeoPixel animation, and recurring idle scans. The Metro M7 factory app builds with Make. Update both Make and CMake source lists; CMake build and hardware validation are pending. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Out-of-tree builds (make BUILD_ROOT, cmake/IDF ARTIFACT_PATH), the check_build.py build contract with tests, and CLAUDE.md for agentrc agents.
Make Metro M7 AirLift factory apps usable with USB-host testers
Add CodeRabbit config
The hil skill's battery runner, roster and contract for mimxrt1060_evk, HIL selection in check_build.py, and BOARD_FLASH_ADDR_ZERO for mimxrt10xx so CURRENT.UF2 reads the flash image.
Select descriptors by negotiated speed and process one-shot erase requests before app validity. Verify flash erase and TinyUF2 installation, including current RT1176 image layout. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Use the GD25Q64E/W25Q64JV 31h status-register-2 write sequence in both Metro flash configurations. The RT1011 initializer reads and preserves SR2, enables QE only when needed, checks each command, and verifies QE readback. Only the exact supported configuration uses this sequence; other RT1011 flash configurations retain their existing initialization behavior. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Set CodeRabbit review profile to chill
…gets (#518) HIL installs now run the build's own flash target (tinyuf2-jlink, ESP-IDF flash) behind a dry-run guard, hash checks and the build-dir lock. Adds the espressif_esp32s3_devkitc_1 battery with the dfu_runtime fixture, kept out of release artifacts.
Move the espressif port, CI and the ESP32-S3 HIL to ESP-IDF v6.1 only.
TinyUF2 on OTG HS (J15), chip revision <3.0. Detach OTG HS before a software restart on P4. Add the board to the build representatives and HIL roster.
Restore the USB-Serial-JTAG D+ pull-up that gpio_config() disables through the pull override; it survives esp_restart's CPU reset and kept the ROM from attaching.
#523) * espressif: drop CONFIG_VFS_SUPPORT_IO=n, which links lwIP under ESP-IDF 6.1 With VFS off, IDF 6.1 resolves libc's _write_r from lwIP's no_vfs_syscalls.c, pulling in the TCP/IP stack (41 KB): adafruit_feather_esp32s3_tft's tinyuf2.bin outgrew its 0x40000 uf2 partition (0x41630). With VFS on it is 0x38cf0. The console gets no USB-Serial-JTAG secondary: TinyUSB takes the shared USB PHY, so that output could only delay writes. * espressif: fail the build when tinyuf2.bin outgrows the uf2 partition IDF's app_check_size only warns while ota_0 still fits. The check runs as part of app, so idf.py flash refuses an image that would spill into ffat; the HIL flash dry-run admits its command. * espressif: report a missing factory partition at build time, not configure * espressif: state the UART0-only console trade-off * espressif: drop the USB-Serial-JTAG secondary console only on ESP32-S3
Apps build as external projects via family_add_app(). CI uses CMake for ports with a board that passed HIL with it (maxim, stm32f4, stm32h5, mimxrt10xx, stm32f3); the rest stay on make until it is removed. CMake ports release with CMake file names, and Build runs on pull requests and master pushes only. Add stm32f303disco to the HIL rig: the runner power-cycles its hub port while DFU is awaited, since the F303 has no internal D+ pull-up.
) * espressif: use ESP-IDF v6 sdkconfig names, drop dead options CONFIG_FLASHMODE_* is CONFIG_ESPTOOLPY_FLASHMODE_* since v5; CONFIG_NEWLIB_NANO_FORMAT does nothing under v6.1's default picolibc. Generated sdkconfig values are unchanged. * espressif: use esptool v5 command spellings * espressif: drop board flash-mode lines that restate the port default
The request is consumed in an RT1011 board_init2() before check_dfu_mode(), so shared src/main.c and the double-tap order for every port stay as on master. The symbol name and .data placement are unchanged, so the tester's address derivation still applies.
Support verified i.MX RT provisioning through full-speed USB hosts
With VFS off, ESP-IDF 6.1 resolves libc's _write_r from lwIP's no_vfs_syscalls.c and links the TCP/IP stack, as #523 found for the bootloader.
Use one named interval for both idle reschedules and update the serial demo messages. Preserve the initial five-second scan and immediate 0xAF factory test. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Release chip select before printing the diagnostic so failure reporting does not alter an active SPI transaction. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Use nonblocking LPSPI1 transfers with the shared scan deadline and abort on timeout. Flush serial output and mark SPI initialization phases to locate the remaining hardware failure. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Return an ADC failure after 100 ms and service USB while waiting. Allow diagnostic markers around A0 conversion, GPIO release, and SPI initialization to drain before the next operation. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Keep raw clock diagnostics while isolating the SPI initialization stall. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Send commands as complete SPI transfers and capture ESP startup and command diagnostics to isolate the unreadable MISO response. Keep existing scan deadlines and pass gates. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Keep bounded Wi-Fi transfers and factory pass gates; remove UART capture, debug commands, and register dumps. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Read indexed RSSI and authentication mode using the bundled NINA 3.3.0 protocol; retain the bounded scan and factory pass requirement. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
Reject ADC timeout sentinels before voltage conversion. Preserve named SSID scan success if optional signal or encryption reads exceed the shared deadline. Co-authored-by: Limor Fried <ladyada@users.noreply.github.com>
…inute-scan Use hardware SPI and visible diagnostics for AirLift Wi-Fi scans
tud_init() is deprecated, usbd_control.c merged into usbd.c, fsdev needs fsdev_common.c, and khci moved to chipidea ci_fs.
Bump tinyusb to ea1d867 and adapt to its API changes
J-Link's stm32f411ve connect resets the chip to remove TinyUF2's write protection, so runner sessions connect as Cortex-M4 and the install verify waits out the option-byte rewrite.
Co-authored-by: cumin <13809292481@163.com>
- LPCXpresso55S69/55S28 enumerate on USB1 high speed (P9); double_m33_express stays on USB0 full speed. - Build lpc55 with CMake in CI. - Fix UF2 copy hang on revision 0A: the ROM FLASH_VerifyProgram loops forever on a mismatch, so compare with FLASH_Read and memcmp; pad erased words with 0xFF in the page cache (fixes #500).
2 of 3 tasks
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UF2_BOARD_IDin your board.h follow correct format from uf2 specsThis checklist items that are not applicable to your PR can be deleted.
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