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Merged
playfulFence merged 4 commits into from
Apr 28, 2026
Merged

Enable RTC timekeeping on C5 and C61 #5449

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8df7a72
Enable RTC timekeeping on C5 and C61
playfulFence Apr 27, 2026
80a209c
rebase
playfulFence Apr 27, 2026
64e1561
changelog entry(ies)
playfulFence Apr 27, 2026
6bf7ceb
enable `lp_timer` qa-test for C5 and C61
playfulFence Apr 27, 2026
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1 change: 1 addition & 0 deletions esp-hal/CHANGELOG.md
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Expand Up @@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0

### Added

- C5 and C61: Enable RTC timekeeping (#5449)
- C61: usb-serial-jtag and debug-assist (#5427)
- C61: dedicated gpio (#5426)

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4 changes: 1 addition & 3 deletions esp-hal/README.md
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Expand Up @@ -94,7 +94,7 @@ For help getting started with this HAL, please refer to [The Rust on ESP Book] a
| RMT | ⚒️ | | ⚒️ | ⚒️ | ⚒️ | | ⚒️ | ⚒️ | ⚒️ |
| RNG | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ |
| RSA | ⚒️ | | ⚒️ | ⚒️ | ⚒️ | | ⚒️ | ⚒️ | ⚒️ |
| RTC Timekeeping | ⚒️ | ⚒️ | ⚒️ | [❌][5162] [^1] | ⚒️ | [❌][5420] [^1] | ⚒️ | ⚒️ | ⚒️ |
| RTC Timekeeping | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ |
| SDIO host | ⚒️ | | | | | | | | ⚒️ |
| SDIO slave | ⚒️ | | | [❌][5169] [^1] | ⚒️ | [❌][5417] [^1] | | | |
| SHA | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ | ⚒️ |
Expand Down Expand Up @@ -129,7 +129,6 @@ For help getting started with this HAL, please refer to [The Rust on ESP Book] a
[5155]: https://github.com/esp-rs/esp-hal/issues/5155
[5160]: https://github.com/esp-rs/esp-hal/issues/5160
[5161]: https://github.com/esp-rs/esp-hal/issues/5161
[5162]: https://github.com/esp-rs/esp-hal/issues/5162
[5163]: https://github.com/esp-rs/esp-hal/issues/5163
[5164]: https://github.com/esp-rs/esp-hal/issues/5164
[5165]: https://github.com/esp-rs/esp-hal/issues/5165
Expand All @@ -144,7 +143,6 @@ For help getting started with this HAL, please refer to [The Rust on ESP Book] a
[5417]: https://github.com/esp-rs/esp-hal/issues/5417
[5418]: https://github.com/esp-rs/esp-hal/issues/5418
[5419]: https://github.com/esp-rs/esp-hal/issues/5419
[5420]: https://github.com/esp-rs/esp-hal/issues/5420
[5421]: https://github.com/esp-rs/esp-hal/issues/5421
[5422]: https://github.com/esp-rs/esp-hal/issues/5422
[5423]: https://github.com/esp-rs/esp-hal/issues/5423
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4 changes: 2 additions & 2 deletions esp-hal/src/rtc_cntl/mod.rs
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Expand Up @@ -232,7 +232,7 @@ impl<'d> Rtc<'d> {

let h = rtc_cntl.time1().read().time_hi().bits();
let l = rtc_cntl.time0().read().time_lo().bits();
} else if #[cfg(any(esp32c6, esp32h2))] {
} else if #[cfg(any(esp32c5, esp32c6, esp32c61, esp32h2))] {
rtc_cntl.update().write(|w| w.main_timer_update().set_bit());

let h = rtc_cntl
Expand Down Expand Up @@ -427,7 +427,7 @@ impl<'d> Rtc<'d> {
#[cfg(lp_timer_driver_supported)]
pub fn set_interrupt_handler(&mut self, handler: InterruptHandler) {
cfg_if::cfg_if! {
if #[cfg(any(esp32c6, esp32h2))] {
if #[cfg(any(esp32c5, esp32c6, esp32c61, esp32h2))] {
let interrupt = Interrupt::LP_WDT;
} else {
let interrupt = Interrupt::RTC_CORE;
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4 changes: 4 additions & 0 deletions esp-metadata-generated/src/_build_script_utils.rs
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Expand Up @@ -1803,6 +1803,7 @@ impl Chip {
"rmt_driver_supported",
"rng_driver_supported",
"rsa_driver_supported",
"lp_timer_driver_supported",
"sha_driver_supported",
"soc_driver_supported",
"spi_master_driver_supported",
Expand Down Expand Up @@ -2051,6 +2052,7 @@ impl Chip {
"cargo:rustc-cfg=rmt_driver_supported",
"cargo:rustc-cfg=rng_driver_supported",
"cargo:rustc-cfg=rsa_driver_supported",
"cargo:rustc-cfg=lp_timer_driver_supported",
"cargo:rustc-cfg=sha_driver_supported",
"cargo:rustc-cfg=soc_driver_supported",
"cargo:rustc-cfg=spi_master_driver_supported",
Expand Down Expand Up @@ -3111,6 +3113,7 @@ impl Chip {
"phy_driver_supported",
"psram_driver_supported",
"rng_driver_supported",
"lp_timer_driver_supported",
"sha_driver_supported",
"soc_driver_supported",
"spi_master_driver_supported",
Expand Down Expand Up @@ -3299,6 +3302,7 @@ impl Chip {
"cargo:rustc-cfg=phy_driver_supported",
"cargo:rustc-cfg=psram_driver_supported",
"cargo:rustc-cfg=rng_driver_supported",
"cargo:rustc-cfg=lp_timer_driver_supported",
"cargo:rustc-cfg=sha_driver_supported",
"cargo:rustc-cfg=soc_driver_supported",
"cargo:rustc-cfg=spi_master_driver_supported",
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1 change: 1 addition & 0 deletions esp-metadata/CHANGELOG.md
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Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0

### Added

- C5 and C61: Enable RTC timekeeping (#5449)

### Changed

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1 change: 0 additions & 1 deletion esp-metadata/devices/esp32c5.toml
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Expand Up @@ -722,7 +722,6 @@ support_status = { status = "not_supported", issue = 5169 }
support_status = { status = "not_supported", issue = 5160 }

[device.lp_timer]
support_status = { status = "not_supported", issue = 5162 }

[device.temp_sensor]
support_status = { status = "not_supported", issue = 5153 }
1 change: 0 additions & 1 deletion esp-metadata/devices/esp32c61.toml
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Expand Up @@ -412,7 +412,6 @@ support_status = { status = "not_supported", issue = 5418 }
support_status = { status = "not_supported", issue = 5419 }

[device.lp_timer]
support_status = { status = "not_supported", issue = 5420 }

[device.sleep]
support_status = { status = "not_supported", issue = 5424 }
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2 changes: 1 addition & 1 deletion qa-test/src/bin/lp_timer.rs
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@@ -1,6 +1,6 @@
//! Demonstrates clock setup and LP_TIMER's accuracy

//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
//% CHIPS: esp32 esp32c2 esp32c3 esp32c5 esp32c6 esp32c61 esp32h2 esp32s2 esp32s3

#![no_std]
#![no_main]
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