SPI: allow forcing CPU-driven blocking transfers#5350
SPI: allow forcing CPU-driven blocking transfers#5350bugadani wants to merge 1 commit intoesp-rs:mainfrom
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/hil full |
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Triggered full HIL run for #5350. Run: https://github.com/esp-rs/esp-hal/actions/runs/24341117212 Status update: ❌ HIL (full) run failed (conclusion: failure). |
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/test-size embassy_spi esp32s3 |
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New commits in main has made this PR unmergable. Please resolve the conflicts. |
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Pull request overview
Adds a new SPI master configuration knob to optionally bypass async/DMA overhead for small transfers by forcing CPU-driven (blocking) transfers under a configurable length threshold.
Changes:
- Introduces
Config::min_async_transfer_size(unstable setter) and stores it in per-peripheralState. - Uses the threshold in
Spi<Async>andSpiBusAsyncimplementations to fall back to blocking transfers for small buffers. - Extends the same threshold behavior to
SpiDma(blocking + async), disabling DMA and executing CPU-driven transfers when below the threshold.
Reviewed changes
Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.
| File | Description |
|---|---|
| esp-hal/src/spi/master/mod.rs | Adds config/state for the threshold and applies it in async SPI paths. |
| esp-hal/src/spi/master/dma.rs | Applies the same threshold to DMA driver paths, with a CPU fallback. |
| esp-hal/CHANGELOG.md | Documents the new SPI master config option. |
| /// Minimum transfer size in bytes below which CPU-driven (blocking) I/O | ||
| /// is used instead of async or DMA transfers. | ||
| /// | ||
| /// This can reduce overhead for small transfers where DMA setup or | ||
| /// async context-switch cost exceeds the benefit. For | ||
| /// [`SpiDma`][crate::spi::master::dma::SpiDma], the threshold applies in | ||
| /// both blocking and async DMA modes: when met, DMA is disabled and the | ||
| /// transfer is performed by the CPU. | ||
| /// | ||
| /// A value of `0` (the default) disables the threshold — all transfers use | ||
| /// the driver's default method. | ||
| #[builder_lite(unstable)] | ||
| min_async_transfer_size: usize, |
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We can have a mile-long field name, or just accept this...
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/hil full --test spi_full_duplex |
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Triggered full HIL run for #5350. Run: https://github.com/esp-rs/esp-hal/actions/runs/25435607324 Status update: ❌ HIL (full) run failed (conclusion: failure). |
Transferring only a few times may be faster than setting up the DMA or rescheduling an async task. This PR adds a configuration that lets users force CPU-driven blocking mode below a certain transfer length, to avoid these setup/reschedule times.