Add SVE2 optimizations for SynetInnerProduct16bGemmNN - #821
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Port Base::SynetInnerProduct16bGemmNN to ARM/ARM64 SVE2 following the existing SSE4.1/AVX2 GemmNN and SVE2 SynetInnerProduct32f patterns. Wire Init dispatch, tests, VS2022 Sve2 project files, and release notes. Co-authored-by: Ihar Yermalayeu <ermig1979@gmail.com>
ermig1979
marked this pull request as ready for review
August 5, 2026 10:30
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Summary
Adds SVE/SVE2 optimizations for
Base::SynetInnerProduct16bGemmNNon ARM/ARM64, following the existing SSE4.1/AVX2 SynetInnerProduct16bGemmNN and SVE2 SynetInnerProduct32f patterns.Changes
src/Simd/SimdSve2SynetInnerProduct16b.cpp—Sve2::SynetInnerProduct16bInitselectsSynetInnerProduct16bGemmNNwhen preferable.src/Simd/SimdSve2SynetInnerProduct16bGemmNN.cpp— SVE2 BF16 GemmNN microkernel (F=svcntw(), microM=5, microN=2*F, microK=2) with Convert/Reorder A/B prep and bias/activation postprocess.SimdSynetInnerProduct16b.h— declareSve2::SynetInnerProduct16bGemmNNandSynetInnerProduct16bInit.SimdLib.cpp— includeSIMD_SVE2_FUNCinSimdSynetInnerProduct16bInit.TestSynetInnerProduct16b.cpp— register SVE2 Autotest.Sve2.vcxproj/.filtersunderSve2\Synet\InnerProduct.docs/2026.html.Validation
./Test "-r=.." -fi=SynetInnerProduct16b -tt=1 -ts=1finished successfully (Base/Sse41/Avx2/Avx512bw/AmxBf16 paths).-march=armv9-a+sve+sve2+i8mm+bf16 -msve-vector-bits=scalablesucceeded.