Correct some doxygen/sphinx warnings or errors.

README.md

@@ -10,7 +10,7 @@ has practical information, known limitations and TODO items.
 
 Lopper is in a single repository, and is available via git or pypi:
 
-### git:
+## git:
 
    % git clone git://github.com/devicetree-org/lopper
 
@@ -32,7 +32,7 @@ Lopper is in a single repository, and is available via git or pypi:
    For yaml file processing, lopper has an optional dependency on python's yaml
    and ruamel, and anytree for importing the contents of yaml files.
 
-#### Using [venv](https://docs.python.org/3/library/venv.html) based flow with git:
+### Using [venv](https://docs.python.org/3/library/venv.html) based flow with git:
 
    Using python3's venv faciliates lopper development and usage. Please refer to
    python documentation to get more information about this topic. Some starting
@@ -64,7 +64,7 @@ Now, everytime you'd like to use lopper, just activate and deactivate within any
     deactivate
 ```
 
-### pypi:
+## pypi:
 
    % pip install lopper
 

docs/amd/zephyr/source/cortex-a78/index.rst

@@ -59,7 +59,7 @@ This step transforms the domain-specific device-tree from Step 1 into a Zephyr-c
 - ``{workspace}``: Output directory for generated files
 - ``system-domain.dts``: Domain-specific device-tree file generated in Step 1
 - ``{proc}``: Processor name (refer to the processor name in the ``pl.dtsi`` file - this varies based on the processor configuration in the Vivado design)
-**Optional**: - ``{zephyr_board_dts}``: Zephyr board-specific device-tree configuration. When provided, it will be compared against the domain-specific device-tree and removes unneeded nodes as per design configuration or mapping requirements
+- **Optional**: ``{zephyr_board_dts}``: Zephyr board-specific device-tree configuration. When provided, it will be compared against the domain-specific device-tree and removes unneeded nodes as per design configuration or mapping requirements
 
 **Output**: ``system-zephyr.dts`` - Zephyr-specific device-tree file
 
@@ -71,13 +71,13 @@ This step transforms the domain-specific device-tree from Step 1 into a Zephyr-c
 Platform-Specific Processor Names
 ---------------------------------
 
-+----------------+--------------------+
-| Platform       | Processor Name     |
-+================+====================+
-| Versal Gen 2   | ``cortexa78_0``    |
-+----------------+--------------------+
++----------------+---------------------+
+| Platform       | Processor Name      |
++================+=====================+
+| Versal Gen 2   | ``cortexa78_0``     |
++----------------+---------------------+
 | Versal Net     | ``psx_cortexa78_0`` |
-+----------------+--------------------+
++----------------+---------------------+
 
 Prerequisites
 -------------

docs/amd/zephyr/source/cortex-r52/index.rst

@@ -59,7 +59,7 @@ This step transforms the domain-specific device-tree from Step 1 into a Zephyr-c
 - ``{workspace}``: Output directory for generated files
 - ``system-domain.dts``: Domain-specific device-tree file generated in Step 1
 - ``{proc}``: Processor name (refer to the processor name in the ``pl.dtsi`` file - this varies based on the processor configuration in the Vivado design)
-**Optional**: - ``{zephyr_board_dts}``: Zephyr board-specific device-tree configuration. When provided, it will be compared against the domain-specific device-tree and removes unneeded nodes as per design configuration or mapping requirements
+- **Optional**: ``{zephyr_board_dts}``: Zephyr board-specific device-tree configuration. When provided, it will be compared against the domain-specific device-tree and removes unneeded nodes as per design configuration or mapping requirements
 
 **Output**: ``system-zephyr.dts`` - Zephyr-specific device-tree file
 
@@ -71,13 +71,13 @@ This step transforms the domain-specific device-tree from Step 1 into a Zephyr-c
 Platform-Specific Processor Names
 ---------------------------------
 
-+----------------+--------------------+
-| Platform       | Processor Name     |
-+================+====================+
-| Versal Gen 2   | ``cortexr52_0``    |
-+----------------+--------------------+
++----------------+---------------------+
+| Platform       | Processor Name      |
++================+=====================+
+| Versal Gen 2   | ``cortexr52_0``     |
++----------------+---------------------+
 | Versal Net     | ``psx_cortexr52_0`` |
-+----------------+--------------------+
++----------------+---------------------+
 
 Prerequisites
 -------------

docs/amd/zephyr/source/microblaze-riscv/index.rst

@@ -45,7 +45,7 @@ This step transforms the domain-specific device-tree from Step 1 into a Zephyr-c
 - ``lop-microblaze-riscv.dts``: Hardware configuration file containing tuning flags in YAML format
 - ``system-domain.dts``: Domain-specific device-tree file generated in Step 1
 - ``{proc}``: Processor name (same as Step 1)
-**Optional**: - ``{zephyr_board_dts}``: Zephyr board-specific device-tree configuration. When provided, it will be compared against the domain-specific device-tree and removes unneeded nodes as per design configuration or mapping requirements
+- **Optional**: ``{zephyr_board_dts}``: Zephyr board-specific device-tree configuration. When provided, it will be compared against the domain-specific device-tree and removes unneeded nodes as per design configuration or mapping requirements
 
 **Output**: ``system-zephyr.dts`` - Zephyr-specific device-tree file
 

specification/source/chapter6-simplified-yaml.rst

@@ -282,7 +282,7 @@ These special key values are an extension to YAML merge keys: <<+ and <<*
      to specify multiple aliases, if a single alias is specified
      (in a list or not) then this is equivalent to <<
 
-<<*: Future: Indicates that node expansion/inheritance should be
+<<\*: Future: Indicates that node expansion/inheritance should be
      performed. This allows the multiple inheritance of YAML
      nodes (in the current implementation it is functionally
      equivalent to <<+)