Skip to content
Open
Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
156 commits
Select commit Hold shift + click to select a range
2f47bdf
[INTERP] Fixed FIST/FISTP/FISTTP range check (#4534)
ksco Oct 7, 2026
c269865
[LA64_DYNAREC] Refined vector registers restore (#4536)
ksco Oct 8, 2026
430a408
[ARM64_DYNAREC] Fixed x87 top restore on interrupted block (#4539)
ksco Oct 8, 2026
a43469d
[RV64_DYNAREC] Refined registers restore on interrupted block (#4540)
ksco Oct 8, 2026
cf250c5
[RV64_DYNAREC] Raise illegal inst error for MOVHPS 0F 17 and MOVLPS 0…
zengdage Oct 8, 2026
89453f4
[ARM64_DYNAREC] Fixed native flags forwarded from REP CMPS/SCAS with …
ksco Oct 8, 2026
2a30952
[ARM64_DYNAREC] Added a few FLAGM optimisations
ptitSeb Oct 8, 2026
b00d767
[ARM64_DYNAREC] Fixed ymm_pos encoding in arch restore (#4542)
ksco Oct 8, 2026
76f318d
[DYNAREC] Fixed x87 cache transform not syncing pending stack count (…
ksco Oct 8, 2026
78ae59d
[INTERP] Better handling of invalid CS on CALL/RET FAR opcodes
ptitSeb Oct 8, 2026
f3bec61
[ARM64_DYNAREC] Better handling of invalid CS on CALL/RET FAR opcodes…
ptitSeb Oct 8, 2026
bffb9ee
[WRAPPER] Add missing parameters for openssl PKCS12_create (#4544)
zengdage Oct 8, 2026
6ece2e8
[ARM64_DYNAREC] Fixed o64 PCMPESTRI fastpath (#4545)
ksco Oct 8, 2026
935b6d0
[DYNAREC] Fixed dynablock not getting out when writing in its own pag…
ksco Oct 9, 2026
55caa39
[TEST] Set emu on the thread (#4547)
ksco Oct 9, 2026
779d69f
[RV64_DYNAREC] Fixed SEW cache after 256-bit AVX instructions (#4548)
ksco Oct 9, 2026
937d39e
[ARM64_DYNAREC] Fixed x87 !fastnan handling with both operands are Na…
ksco Oct 9, 2026
a489cfe
[WOWBOX64] Fix exceptions in JIT code above 4GB and pass the fault st…
mikolajserediuk Oct 9, 2026
72cbb14
[RV64_DYNAREC] Use ADDSL to replace SLLI+ADD pattern (#4551)
zengdage Oct 10, 2026
8497266
[RV64_DYNAREC] Fixed x87 FST/FSTP float NaN handling (#4553)
ksco Oct 10, 2026
f9bc4a4
[RV64_DYNAREC] Ported up32 and rsp merge optimization (#4554)
ksco Oct 10, 2026
630c403
[RV64_DYNAREC] Replaced fpu_purgecache with BARRIER_FLOAT (#4552)
ksco Oct 10, 2026
c5ddad2
[RV64_DYNAREC] Fix ADDI(x1, x1, 0xffff) and ANDI(x1, x1, 0xffff) (#4555)
zengdage Oct 10, 2026
343ff5f
[RV64_DYNAREC] Added a few more opcodes (#4556)
ksco Oct 10, 2026
397f1f1
[RV64_DYNAREC] Optimize VMAXPS family opcodes (#4557)
zengdage Oct 10, 2026
c6a8c44
[RV64_DYNAREC] Fixed a few lock opcodes (#4558)
ksco Oct 10, 2026
ee03a07
[RV64_DYNAREC] Fixed some recently introduced issues (#4560)
ksco Oct 12, 2026
7de6142
[DYNAREC] Write back the fpu cache before an instruction following un…
ksco Oct 12, 2026
0684e43
[RV64_DYNAREC] Fix PUSHAD and signal state recovery if rsp_merge is e…
zengdage Oct 12, 2026
93cda37
[INTERP] Fixed some over reads in cosim (#4563)
ksco Oct 13, 2026
a95f10c
[RV64_DYNAREC] Fixed vector PINSRD opcode and added vector PINSRB opc…
ksco Oct 13, 2026
ef7005d
[DYNAREC] Small refactor on STRONGMEM handling
ptitSeb Oct 13, 2026
45f85ef
[ARM64] Added LRCPC, LRCPC2 and LRCPC3 detection
ptitSeb Oct 13, 2026
868e020
[RV64_DYNAREC] Fix incorrect bit position of IE bit in MXCSR (#4565)
zengdage Oct 13, 2026
986c69c
[RV64_DYNAREC] Fix MMX cache corruption in VPERMILPS (#4566)
zengdage Oct 13, 2026
4437c9b
[ARM64_DYNAREC] Use LRCPC2 for the UnityHack if LRCPC2 and USCAT cpu …
ptitSeb Oct 13, 2026
1f7fd2a
[INTERP] Fixed more over reads in cosim (#4568)
ksco Oct 14, 2026
c51e58b
Revert "[DYNAREC] Write back the fpu cache before an instruction foll…
ptitSeb Oct 14, 2026
d653d0e
[RV64_DYNAREC] Fix VMOVQ vl (#4569)
zengdage Oct 14, 2026
157dd83
Improved log for Special SIGBUS fixing
ptitSeb Oct 15, 2026
e296745
[ARM64_DYNAREC] Fixes some opcode emitter and Special SIGBUS handler
ptitSeb Oct 15, 2026
b99d443
[RV64_DYNAREC] Refactored AVX register mapping and register allocatio…
ksco Oct 16, 2026
4e91870
[DYNAREC] Fixed fpu cache not written back after unused opcodes (agai…
ksco Oct 16, 2026
4379005
[RV64_DYNAREC] Purge at merge point with different YMM state (#4576)
ksco Oct 17, 2026
27860e6
[RV64_DYNAREC] Fix VCVTPD2PS result clearing (#4572)
zengdage Oct 17, 2026
66dafa5
[RV64_DYNAREC] Added and refined more opcodes (#4578)
ksco Oct 18, 2026
75ff158
[ARM64_DYNAREC] Enlarged a buffer
ptitSeb Oct 19, 2026
3ee377b
[RV64_DYNAREC] Added XMM/YMM preload support
ksco Oct 19, 2026
b9bf3c3
[RV64_DYNAREC] Raised MXCSR invalid flag on overflow
ksco Oct 19, 2026
30449e9
[RV64_DYNAREC] Fixed YMM upper 128-bit writeback
ksco Oct 19, 2026
d166be5
[RV64_DYNAREC] Restricted AES vector path to 128-bit operands
ksco Oct 19, 2026
d11def2
[RV64_DYNAREC] Kept vtype across linear instructions
ksco Oct 19, 2026
2c3ac5f
[RV64_DYNAREC] Forced vsetvli in SSE cache purge
ksco Oct 19, 2026
259ba9f
[RV64_DYNAREC] Used encoded registers for AVX vector operands
ksco Oct 19, 2026
d0c7da5
[RV64_DYNAREC] Added combined VY/EY/GY vector load macros
ksco Oct 19, 2026
d07e3de
[RV64_DYNAREC] Fixed AVX source/destination aliasing
ksco Oct 19, 2026
3835fe3
[RV64_DYNAREC] Used vl=1 RVV for scalar SSE/AVX opcodes
ksco Oct 19, 2026
db0615c
[RV64_DYNAREC] Used LMUL1 scratch for byte shuffles
ksco Oct 19, 2026
ae3412c
[RV64_DYNAREC] Deferred upper-zero and matched AVX load SEW
ksco Oct 19, 2026
d96343f
[RV64_DYNAREC] Added and optimized some SSE/AVX opcodes (#4581)
ksco Oct 21, 2026
a111fca
[RV64_DYNAREC] Fix vector register aliasing
zengdage Oct 21, 2026
8851be9
[WOWBOX64] Fixed GetEnvironnementVariableA (for #4585)
ptitSeb Oct 22, 2026
fbba162
[RCFILE] Optimise steam profile
ptitSeb Oct 22, 2026
082ecb9
[RV64_DYNAREC] Use bseti for single-bit 64-bit constants
zengdage Oct 21, 2026
f267770
[RV64_DYNAREC] Optimize contiguous-1-bit cases
zengdage Oct 21, 2026
39aae76
[RV64_DYNAREC] Optimized some AVX opcodes (#4586)
ksco Oct 22, 2026
0b0a31c
[RV64_DYNAREC] Avoid redundant vsetvli when loading vector masks (#4583)
zengdage Oct 23, 2026
827f0ee
[RV64_DYNAREC] Optimitize VSHUFPS and VPERMILPS 128-bit case
zengdage Oct 21, 2026
5735c8b
[RV64_DYNAREC] Optimize some opcodes by removing redundant some vsetv…
zengdage Oct 23, 2026
420eda6
[RV64_DYNAREC] Fix VPERM2I128 vector mask multiple (#4589)
zengdage Oct 23, 2026
a46ad9d
[RV64_DYNAREC] Reworked move immediate (#4591)
ksco Oct 25, 2026
7fffe8d
[RV64_DYNAREC] Fixed CMPXCHG up32 handling (#4593)
ksco Oct 26, 2026
d04c270
[RV64_DYNAREC] Fixed dynarec dump buffer overflow (#4595)
ksco Oct 26, 2026
1d2083f
[RV64][CMAKE] Disabled auto-vectorization (#4596)
ksco Oct 26, 2026
1a49e47
[RV64_DYNAREC] Fixed stale YMM upper in scalar AVX upper access (#4594)
ksco Oct 26, 2026
e8a2f7f
[RV64_DYNAREC] Skipped cache type sync when no vector reg is used (#4…
ksco Oct 26, 2026
3c563ba
[RV64_DYNAREC] Added fast path to extcacheUnwind (#4599)
ksco Oct 26, 2026
a62e03f
[RV64_DYNAREC] Fix width error for VMOVSS (#4600)
zengdage Oct 26, 2026
4934107
[RV64_DYNAREC] Optimized a few AVX opcodes (#4601)
ksco Oct 26, 2026
be6e39c
[RV64_DYNAREC] Added more AVX opcodes (#4602)
ksco Oct 26, 2026
319a1a8
[RV64_DYNAREC] Avoid duplicate YMM upper zeroing on SSE cache purge (…
ksco Oct 26, 2026
e9f705d
[RV64_DYNAREC] Avoid duplicate pending-zero upper stores (#4604)
ksco Oct 26, 2026
61add52
[RV64_DYNAREC] Use generic vector stores for XMM spills (#4605)
ksco Oct 26, 2026
21c14f1
[RV64_DYNAREC] Keep origin vtype for VPMOVSX and VPMOVZX opcodes (#4607)
zengdage Oct 26, 2026
11effee
Arm64 lrcpc (#4608)
ptitSeb Oct 26, 2026
74ee428
[DYNAREC] Added callret=3 and move in_used tracking to it (#4609)
ksco Oct 26, 2026
4b7d2ea
[RV64_DYNAREC] Remove redundant vsetvli from scalar AVX prolog (#4611)
ksco Oct 27, 2026
63ed07a
[RV64_DYNAREC] Store VMOVSS directly from the vector register (#4612)
ksco Oct 27, 2026
11a20e3
[RV64_DYNAREC] Emit scalar AVX FMA with vl=1 (#4613)
ksco Oct 27, 2026
9cb238f
[RV64_DYNAREC] Fixed missing read tracking in AVX register loads (#4614)
ksco Oct 28, 2026
13f5aea
[RV64_DYNAREC] Fixed vtype tracking across cache transforms (#4615)
ksco Oct 28, 2026
61bbb76
[RV64_DYNAREC] Fixed displacement range for some opcodes (#4616)
ksco Oct 28, 2026
c4eb274
[RV64_DYNAREC] Fixed extcache initialization for preloaded registers …
ksco Oct 28, 2026
78217d3
[RV64_DYNAREC] Reset vtype tracking at block start and reset (#4618)
ksco Oct 28, 2026
4c6be6c
[RV64_DYNAREC] Kept pending YMM zero mask on local purges (#4619)
ksco Oct 28, 2026
ec2f98e
[RV64_DYNAREC] Fixed up32 handling in some opcodes (#4620)
ksco Oct 28, 2026
2da6411
[RV64_DYNAREC] Fixed vtype restore skipped by epilog branches (#4621)
ksco Oct 28, 2026
3795fe4
[RV64_DYNAREC] Fix POPCNT/TZCNT/LZCNT with 66h and rex.w prefix (#4622)
zengdage Oct 28, 2026
ea513ac
[RV64_DYNAREC] Cleared pending zero on materialized upper halves (#4623)
ksco Oct 28, 2026
30d5c77
[RV64_DYNAREC] Keep live YMMs cached across merge points, skip dead w…
ksco Oct 28, 2026
4e8f73c
[DEBIAN] Fix changelog formatting (#4625)
zqb-all Oct 29, 2026
4df6988
[ARM64_DYNAREC] Fixed xmm value lost in a loop (#4627)
ksco Oct 29, 2026
5055f94
[ARM64_DYNAREC] Fixed wrong x87 NaN sign with memory operands (#4628)
ksco Oct 29, 2026
07e9e5c
Fix typos in documentation (#4629)
hamidzr Oct 29, 2026
25418aa
[ARM64_DYNAREC] Fixed another xmm value lost in a loop (#4630)
ksco Oct 30, 2026
7e06f2b
[INTERP] Fix some small errors (#4631)
zengdage Oct 30, 2026
5250c6e
[ARM64_DYNAREC] Fixed BOUND leaking a cleared deferred flags state (#…
ksco Oct 30, 2026
d318afe
[INTERP] Added 16-bit LOCK BTR/BTC/BTS opcodes (#4634)
ksco Oct 30, 2026
fb0b267
[ARM64_DYNAREC] Don't skip dirty preloaded regs on loopback (#4626)
ksco Oct 30, 2026
75cff5c
[INTERP] Fixed unaligned LOCK BTS (#4635)
ksco Oct 30, 2026
6c88bbd
[RV64_DYNAREC] Keep live XMMs when reflecting cache (#4624)
zengdage Oct 30, 2026
8a7a148
[RV64_DYNAREC] Translate round mode for some int to float convert opc…
zengdage Oct 30, 2026
81e0246
[DYNAREC] Small fixes to in_used tracking (#4638)
ksco Oct 30, 2026
6367180
[ARM64_DYNAREC] Fixed 16-bit BT/BTS/BTR/BTC displacement scale (#4639)
ksco Oct 30, 2026
6dfbebd
[ARM64_DYNAREC] Fixed YMM upper half lost with VPCLMULQDQ fallback (#…
ksco Oct 30, 2026
a7f9094
[INTERP] Fixed more unaligned LOCK BT* opcodes (#4641)
ksco Oct 31, 2026
d74ec76
[DYNAREC] Don't run a block that intersects a hot page (#4642)
ksco Oct 31, 2026
d7124fd
[DYNAREC] Reused getDB result is InternalDBGetBlock (linked with #4642)
ptitSeb Oct 31, 2026
f60dea9
[ARM64_DYNAREC] Keep the guest base register when adding a segment ba…
Nicklets Oct 31, 2026
e86a766
[ARM64] Added a dection of write error on segfault using extra signal…
ptitSeb Oct 31, 2026
5177ca4
[LA64_DYNAREC] Fixed AES source being clobbered by AVX cache sync in …
ksco Oct 31, 2026
93c68ac
[LA64_DYNAREC] Restore pending scalar XMM values on signal exit (#4647)
ksco Oct 31, 2026
0b046f5
[DYNAREC] Fixed deferred 16-bit SHLD/SHRD flags with count>16 (#4648)
ksco Nov 1, 2026
8956607
[RV64_DYNAREC] Do locked bit ops on the aligned 32-bit word
ksco Nov 1, 2026
9f0814e
[RV64_DYNAREC] Zero-extend SHLD/SHRD destination in 32-bit mode
ksco Nov 1, 2026
5cc72d9
[RV64_DYNAREC] Reset vtype tracking after native calls
ksco Nov 1, 2026
59955e1
[RV64_DYNAREC] Restore YMM upper halves after a native call
ksco Nov 1, 2026
37d91ce
[RV64_DYNAREC] Fixed cache transform on a back-edge to the block start
ksco Nov 1, 2026
74d9149
[DYNAREC] Rollbacked a wrong optimization in PR #4648 (#4650)
ksco Nov 1, 2026
22f67f2
[DYNAREC] Clear pending df on all DIV/IDIV paths (#4651)
ksco Nov 1, 2026
27fd407
[DYNAREC] Preserved flags when a block is truncated on a fill fault (…
ksco Nov 2, 2026
23597f6
[RV64_DYNAREC] Keep SEW when flushing YMM upper halves to reduce vset…
zengdage Nov 2, 2026
20807c2
[RV64_DYNAREC] Reuse zero-extended operands in fused 32-bit compares …
ksco Nov 3, 2026
d338d46
[RV64] Reset RVV extensions when vector is disabled (#4658)
ksco Nov 3, 2026
b8171c2
[RV64_DYNAREC] Track zero-extension of LEA and SRLIW results (#4659)
ksco Nov 3, 2026
03d689b
[RV64_DYNAREC] Materialize direct call return address from xRIP (#4660)
ksco Nov 3, 2026
3d48b55
[RV64_DYNAREC] Extend nativeflags to 1+N pattern (#4661)
ksco Nov 3, 2026
6bee368
[RV64_DYNAREC] Fence stores at RET by default (#4655)
ksco Nov 3, 2026
9c5e8a5
[RV64_DYNAREC] Include up32 and rsp in arch state detection (#4662)
ksco Nov 3, 2026
b640a57
[RV64_DYNAREC] Use fence.tso for RET and strongmem barriers (#4663)
ksco Nov 3, 2026
b71b003
[RV64_DYNAREC] Added autocrc support (#4664)
ksco Nov 3, 2026
27a2d1f
[WRAPPER] Wrapped CRYPTO_set_mem_functions for libcrypto.so.3 (#4665)
ksco Nov 3, 2026
83935bc
[BOX64EC] Compile Dynarec emitters, add Box64EC register mapping (#4666)
airidosas252 Nov 5, 2026
59b3eb1
[RV64_DYNAREC] Reuse sew to remove vsetvli for avx_load_reg_vector (#…
zengdage Nov 5, 2026
5c60cf8
[ARM64_DYNAREC] Small optimsation for test emitters
ptitSeb Nov 5, 2026
4049cea
Windows builds needs ULL to be 64bits
ptitSeb Nov 6, 2026
0b5002e
[SIGNAL] Restore FPU state and drop deferred flags when a handler cha…
beverage Nov 6, 2026
50855a1
[ARM64_DYNAREC] Fix native flags record in signal arch info (#4678)
beverage Nov 6, 2026
70cdfdb
Fixed proc/self/maps formating (for #4681)
ptitSeb Nov 7, 2026
37f5e4b
Expand special names in DT_NEEDED names too (for #4682)
ptitSeb Nov 7, 2026
20cff3b
[WINE] Allows wine 11.21+ to start
ptitSeb Nov 8, 2026
5daced4
[WINE] Fixed some issues with vc_redist.x64.exe that fails to install…
ptitSeb Nov 8, 2026
c8ad5c3
[VULKAN] Added 1 more extension
ptitSeb Nov 8, 2026
7a7da0c
Musl build 01 housekeeping (#4670)
peppergrayxyz Nov 9, 2026
c2b5bb5
[WRAPPER] Added wl_proxy_add_dispatcher to wayland-client (#4686)
ksco Nov 9, 2026
25d0e4c
[WRAPPER] Fixed my_execve path check for wrapped libc allocations (#4…
ksco Nov 9, 2026
File filter

Filter by extension

Filter by extension


Conversations
Failed to load comments.
Loading
Jump to
The table of contents is too big for display.
Diff view
Diff view
  •  
  •  
  •  
2 changes: 1 addition & 1 deletion .github/workflows/release.yml
Original file line number Diff line number Diff line change
Expand Up @@ -261,7 +261,7 @@ jobs:
echo "BOX64_COMPILER=loongarch64-linux-gnu-gcc" >> $GITHUB_ENV
sudo apt-get -y install git cmake make python3 libzydis-dev
elif [[ ${{ matrix.platform }} == 'PPC64LE' ]]; then
echo BOX64_PLATFORM_MARCRO="-DPPC64LE=ON" >> $GITHUB_ENV
echo BOX64_PLATFORM_MARCRO="-DPPC64LE=ON -DBAD_SIGNAL=ON" >> $GITHUB_ENV
echo "BOX64_COMPILER=powerpc64le-linux-gnu-gcc" >> $GITHUB_ENV
sudo apt-get -y install git gcc-powerpc64le-linux-gnu cmake make python3 libzydis-dev
else
Expand Down
2 changes: 1 addition & 1 deletion AGENTS.md
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ These use cases are **permitted** when making a contribution with the help of AI
- Formatting code for consistency and readability (but do not overload code with comments)
- Completing code segments based on established patterns
- Drafting documentation for project components with which the contributor is already familiar
- Writting Wrappers Callback handling and/or wrappers structures conversion when needed
- Writing Wrappers Callback handling and/or wrappers structures conversion when needed

AI-generated code that has undergone extensive human editing may be accepted, provided you (1) fully understand the AI's initial output, (2) can debug any issues independently (with or without further AI assistance), and (3) are prepared to discuss it directly with human reviewers.

Expand Down
7 changes: 6 additions & 1 deletion CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -265,8 +265,9 @@ elseif(LARCH64)
set(ASMFLAGS -pipe -march=loongarch64)
elseif(RV64)
add_definitions(-DRV64)
set(CFLAGS -pipe -march=rv64gc)
set(CFLAGS -pipe -march=rv64gc -fno-tree-vectorize)
set(ASMFLAGS -pipe -march=rv64gc)
add_compile_options(-fno-tree-vectorize)
elseif(PPC64LE)
add_definitions(-DPPC64LE)
set(CFLAGS -pipe -mcpu=power9)
Expand Down Expand Up @@ -384,6 +385,8 @@ endif()
set(BOX64_ROOT ${CMAKE_SOURCE_DIR})

add_definitions(-std=gnu11 -funwind-tables -fvisibility=hidden)
add_definitions(-D_GNU_SOURCE=1)
add_definitions(-D_FILE_OFFSET_BITS=64)

if(USE_CCACHE)
find_program(CCACHE_FOUND ccache)
Expand Down Expand Up @@ -1103,6 +1106,7 @@ if(RV64_DYNAREC)
"${BOX64_ROOT}/src/dynarec/rv64/rv64_printer.c"
"${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_jmpnext.c"
"${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_consts.c"
"${BOX64_ROOT}/src/dynarec/rv64/rv64_mov_imm.c"
"${BOX64_ROOT}/src/dynarec/rv64/updateflags_rv64.c"
)
set(DYNAREC_ASM
Expand Down Expand Up @@ -1675,6 +1679,7 @@ if(ARM64EC)
SOURCE_DIR "${CMAKE_CURRENT_SOURCE_DIR}/wine/box64ec"
CMAKE_ARGS
-DCMAKE_TOOLCHAIN_FILE=${CMAKE_CURRENT_SOURCE_DIR}/wine/toolchain_mingw_arm64ec.cmake
-DDYNAREC_PASS_STR=${DYNAREC_PASS_STR}
-DINTERPRETER_STR=${INTERPRETER_STR}
-DCMAKE_BUILD_TYPE=${CMAKE_BUILD_TYPE}
INSTALL_COMMAND ""
Expand Down
4 changes: 2 additions & 2 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -58,14 +58,14 @@ Box64 requires 64-bit libraries on the host system, as it directly translates x8
1. Box32 is still experimental, but it's pretty stable now and can be used.
2. Some shell scripts (such as the GOG game installer) may rely on `uname -m` to determine the current architecture. Please run them as `box64 script.sh` to allow Box64 to take over.

Note that DynaCache is now enabled by default (with compression). This will creates files in `~/.cache/box64` to save generated code for executed binaries and libraries, so launch time can be greatly reduced on second run. The files are compressed and will take up to 2Gb by default. You can disable DynaCache writting, by switching it to a Read-only mode by creating (or modifying) `~/.box64rc` and writting there
Note that DynaCache is now enabled by default (with compression). This will creates files in `~/.cache/box64` to save generated code for executed binaries and libraries, so launch time can be greatly reduced on second run. The files are compressed and will take up to 2Gb by default. You can disable DynaCache writing, by switching it to a Read-only mode by creating (or modifying) `~/.box64rc` and writing there

```ini
[*]
BOX64_DYNACACHE=2
```

(or 0 to completly disabled it). Please refer to [Usage Documentation](docs/USAGE.md) for more details on how to configure Box64.
(or 0 to completely disabled it). Please refer to [Usage Documentation](docs/USAGE.md) for more details on how to configure Box64.

---

Expand Down
1 change: 1 addition & 0 deletions configurator/model.py
Original file line number Diff line number Diff line change
Expand Up @@ -103,6 +103,7 @@ class ValueState:
("BOX64_DYNAREC_BIGBLOCK", "0"),
("BOX64_DYNAREC_SAFEFLAGS", "2"),
("BOX64_DYNAREC_STRONGMEM", "2"),
("BOX64_DYNAREC_CALLRET", "3"),
),
"safe": (
("BOX64_DYNAREC_BIGBLOCK", "0"),
Expand Down
Loading
Loading